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DB: fix detection of Intel CPUs prefixed by 'N' or 'U'
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2cf3965cbd
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f60666409c
2 changed files with 13 additions and 4 deletions
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@ -166,6 +166,7 @@ enum _intel_bits_t {
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_V = LBIT( (LAST_COMMON_BIT + 20) ), // Lunar Lake
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_L = LBIT( (LAST_COMMON_BIT + 21) ), // LGA package (UL = Power efficient, in LGA package / HL = Highest performance, in LGA package)
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_T = LBIT( (LAST_COMMON_BIT + 22) ), // Power-optimized lifestyle
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_U_ = LBIT( (LAST_COMMON_BIT + 23) ),
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};
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typedef enum _intel_bits_t intel_bits_t;
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@ -505,13 +505,13 @@ const struct match_entry_t cpudb_intel[] = {
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{ 6, 10, -1, -1, 154, -1, -1, -1, NC, CORE_|_I_|_7|_H|_L, _12xxx, "Alder Lake-PS (Core i7)" },
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{ 6, 10, -1, -1, 154, -1, -1, -1, NC, CORE_|_I_|_5|_H|_L, _12xxx, "Alder Lake-PS (Core i5)" },
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{ 6, 10, -1, -1, 154, -1, -1, -1, NC, CORE_|_I_|_3|_H|_L, _12xxx, "Alder Lake-PS (Core i3)" },
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{ 6, 14, -1, -1, 190, -1, -1, -1, NC, CORE_|_I_|_3|_N , 0, "Alder Lake-N (Core i3)" },
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{ 6, 14, -1, -1, 190, -1, -1, -1, NC, CORE_|_I_|_3|_N_ , 0, "Alder Lake-N (Core i3)" }, /* Core i3 N300 + Core i3 N305 */
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{ 6, 14, -1, -1, 190, 4, -1, -1, NC, _N_ , 0, "Alder Lake-N (Intel Processor)" },
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{ 6, 14, -1, -1, 190, 2, -1, -1, NC, _N_ , 0, "Alder Lake-N (Intel Processor)" },
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{ 6, 14, -1, -1, 190, 2, -1, -1, NC, _N_ , 0, "Alder Lake-N (Intel Processor)" }, /* Intel Processor N50 */
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{ 6, 14, -1, -1, 190, -1, -1, -1, NC, ATOM_ , 0, "Alder Lake-N (Atom)" },
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/* Twin Lake CPUs (2025, Intel 7) => https://en.wikichip.org/wiki/intel/microarchitectures/twin_lake */
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{ 6, 14, -1, -1, 190, 8, -1, -1, NC, CORE_|_3|_N_ , _x5x, "Twin Lake-N (Core 3)" },
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{ 6, 14, -1, -1, 190, 4, -1, -1, NC, _N , _x5x, "Twin Lake-N (Intel Processor)" },
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{ 6, 14, -1, -1, 190, 8, -1, -1, NC, CORE_|_3|_N_ , _x5x, "Twin Lake-N (Core 3)" }, /* Core 3 N350 + Core 3 N355 */
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{ 6, 14, -1, -1, 190, 4, -1, -1, NC, _N_ , _x5x, "Twin Lake-N (Intel Processor)" }, /* Intel Processor N150 + Intel Processor N150 */
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/* Raptor Lake CPUs (2022, 13th Core i gen, Intel 7) => https://en.wikichip.org/wiki/intel/microarchitectures/raptor_lake */
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{ 6, 15, -1, -1, 191, -1, -1, -1, NC, CORE_|_I_|_5 , _13xxx, "Raptor Lake-S (Core i5)" }, // "Golden Cove" cores
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@ -528,6 +528,7 @@ const struct match_entry_t cpudb_intel[] = {
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{ 6, 10, 3, -1, 186, -1, -1, -1, NC, CORE_|_I_|_7|_U , 0, "Raptor Lake-U (Core i7)" },
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{ 6, 10, 3, -1, 186, -1, -1, -1, NC, CORE_|_I_|_5|_U , 0, "Raptor Lake-U (Core i5)" },
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{ 6, 10, 3, -1, 186, -1, -1, -1, NC, CORE_|_I_|_3|_U , 0, "Raptor Lake-U (Core i3)" },
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{ 6, 10, 3, -1, 186, -1, -1, -1, NC, _U_ , 0, "Raptor Lake-U (Intel Processor)" }, /* Intel Processor U300 */
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{ 6, 10, -1, -1, 186, -1, -1, -1, NC, CORE_|_I_|_9|_H , _13xxx, "Raptor Lake-H (Core i9)" },
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{ 6, 10, -1, -1, 186, -1, -1, -1, NC, CORE_|_I_|_7|_H , _13xxx, "Raptor Lake-H (Core i7)" },
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{ 6, 10, -1, -1, 186, -1, -1, -1, NC, CORE_|_I_|_5|_H , _13xxx, "Raptor Lake-H (Core i5)" },
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@ -889,6 +890,13 @@ static intel_code_and_bits_t get_brand_code_and_bits(struct cpu_id_t* data)
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case 'W': bits |= _W_; break;
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}
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}
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else if ((i = match_pattern(bs, "[NU]##")) != 0) {
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i--;
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switch (bs[i]) {
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case 'N': bits |= _N_; break;
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case 'U': bits |= _U_; break;
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}
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}
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if (((bits & PENTIUM_) || (bits & CELERON_)) && ((i = match_pattern(bs, "[JN]")) != 0)) {
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i--;
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