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535 commits

Author SHA1 Message Date
Xorg
77575736dd Move code from cpu_msrinfo() in subfunctions 2016-05-27 14:02:24 +02:00
Veselin Georgiev
db65e9a6b0 Fix a few Doxygen warnings and errors. Beautify docs a bit. 
Also rename Doxyfile to Doxyfile.in, add it in configure and replace
version and pathspec in it with macros.
 2016-05-22 23:20:16 +03:00
Veselin Georgiev
8c629d76b4 Fix minor issues with comments/documentation. 
Also add a comment about the upcoming version 0.2.3. A date is not
stated, as this will be done when the actual release happens (and
I will collect any further patches up to that moment). I expect the
release to be over the next weekend.
 2016-05-22 22:52:58 +03:00
Veselin Georgiev
00f349a7a3 Fix issue #45: OS X compilation error 2016-05-21 16:10:39 +03:00
Veselin Georgiev
7c7a0fea8b Merge pull request #43 from X0rg/master 
Changes for MSR
 2016-05-19 22:09:51 +01:00
Xorg
b067c68073 Use unsigned type instead of uint8_t as parameter for cpu_msr_driver_open_core() 2016-05-19 08:46:19 +02:00
Veselin Georgiev
14d6a9d875 Fix cpu_clock_by_ic() for Skylake (it was 1.6 times too high). 
The reason and fix is similar to what we did previously for Bulldozer.
 2016-05-19 01:37:45 +03:00
Veselin Georgiev
7b9fe29cef Support for Skylake. 
- Detection of hle, rtm, avx512* and sha-ni instructions
- Detection for Skylake
- Add test with Skylake i5
 2016-05-19 01:37:45 +03:00
Veselin Georgiev
3a977a4f99 Add detection support for the AMD TBM instructions. Update Vishera test. 2016-05-19 01:37:45 +03:00
Xorg
c2c32a1a70 Remove unnecessary tests in cpu_rdmsr_range() 2016-05-18 20:51:13 +02:00
Xorg
85bac12db4 Drop get_bits_value() 2016-05-18 20:46:47 +02:00
Xorg
801d4c982a Fix checking of core_num in cpu_msr_driver_open_core() 2016-05-18 18:42:11 +02:00
X0rg
aaa7e155a9 Fix some warnings 
rdmsr.c:616:10: warning: comparison of 0 <= unsigned expression is always true [-Wtautological-compare]
                                if(0 <= val && val <= 7) { // Support 8 P-states
                                   ~ ^  ~~~
rdmsr.c:572:8: warning: variable 'val' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
                                if(!multiplier)
                                   ^~~~~~~~~~~
rdmsr.c:574:8: note: uninitialized use occurs here
                                if(val > 0) {
                                   ^~~
rdmsr.c:572:5: note: remove the 'if' if its condition is always true
                                if(!multiplier)
                                ^~~~~~~~~~~~~~~
rdmsr.c:541:14: note: initialize the variable 'val' to silence this warning
        uint64_t val;
                    ^
                     = 0
2 warnings generated.
 2016-05-18 18:15:39 +02:00
X0rg
5272d9f060 Add MSR support for FreeBSD 
Tested on GhostBSD (based on FreeBSD)
It should work on DragonFlyBSD (the cpuctl driver has been ported from FreeBSD)
The situation for OpenBSD and NetBSD is not clear ; not supported
 2016-05-18 18:06:23 +02:00
Xorg
6c70d53a18 Do some rearrangements in rdmsr.c file 
I need to do that to add support for FreeBSD
 2016-05-18 17:18:59 +02:00
Xorg
841c975e95 Make get_bits_value() more robust 2016-05-18 16:51:38 +02:00
Xorg
1d5ac6f23f Set cpu_rdmsr_range() and get_bits_value() as public functions 2016-05-18 16:47:06 +02:00
Xorg
9ce0158b88 Use get_bits_value() inside cpu_rdmsr_range() 2016-05-18 16:32:40 +02:00
Xorg
c9926ab6f7 Imrove cpu_rdmsr_range(), make header similar to cpu_rdmsr() 2016-05-18 14:59:55 +02:00
Xorg
b5e82df407 Add AMD support for INFO_VOLTAGE in cpu_msrinfo() 2016-05-18 14:22:24 +02:00
Veselin Georgiev
1145fdc116 Change signature of cpu_rdmsr: the msr index type changed to uint32. 2016-05-17 17:03:26 +03:00
Veselin Georgiev
f3f92402dc Remove duplication of data in lists intel_code_t / intel_bcode_str, etc. 2016-05-17 13:28:30 +03:00
wdlkmpx
04c01ad7f9 Show intel detected brand code string 
So that it's easier to test and debug
 2016-05-17 13:08:16 +03:00
wdlkmpx
be254c30ef Add 2 Intel P4 tests / Rename some tests/codenames 
Rename some codenames to keep things tidy
 2016-05-17 13:08:16 +03:00
wdlkmpx
061bd5986c Ability to display AMD brand code 
So that it's easier to test and debug

Also added AMD Champlain mobile
Processor: AMD Athlon(tm) II P320 Dual-Core Processor
 2016-05-11 21:21:02 +00:00
wdlkmpx
7aa3155fc5 Add Arrandale mobile 
Processor: Intel(R) Pentium(R) CPU        P6100  @ 2.00GHz
 2016-05-07 19:43:33 +00:00
wdlkmpx
4047785e97 Recognize Dual Core (Penryn) and more Core2 processors 
By adding a new entry to the match table

There's also a new test:
 Intel Pentium Dual-Core Mobile T4500
 Specs:
 http://www.cpu-world.com/CPUs/Pentium_Dual-Core/Intel-Pentium%20Dual-Core%20Mobile%20T4500%20AW80577GG0521MA.html
 2016-04-28 00:28:07 +00:00
Veselin Georgiev
1073370613 Related to pull request #35: Expose intel brand & model codes. 
The detected intel brand code and model code (arbitrary numbers,
related to the detection algorithm) are printed at verbosiness level
2 or higher. You can see them with `cpuid_tool --all -vv` (if running
on an Intel CPU), or, generally, when decoding Intel CPU data, e.g.
`cpuid_tool --load=tests/intel/nehalem/bloomfield.test --all -vv`.
 2016-04-26 16:29:51 +03:00
Veselin Georgiev
db6f3abc9a Merge pull request #34 from wdlkmpx/master 
Fix issue with HyperThreading status in old cpus
 2016-04-25 01:51:24 +03:00
wdlkmpx
f26c1151f0 Fix issue with HyperThreading status in old cpus 
Early P4 processors come with the HT flag, but that feature
is not enabled.

This makes it work the way it should.
 2016-04-24 17:28:16 +00:00
Kurt Cancemi
5ca7b2deee AMD associativity table Dh should contain 96 not 92 2016-04-24 00:26:00 -04:00
Kurt Cancemi
6ea1d4c8e2 Fix PCLMULQDQ, SSE4.1, MOVBE and RDRAND detection on AMD processors 2016-04-24 00:24:31 -04:00
wdlkmpx
eb6f1a2b9a More precise descriptions for some old processors 
PII Celeron:
Model 5 = Celeron Covington = PII Deschutes
Model 6 = Celeron Mendocino = PII Dixon

PII Xeon:
Model 3 = Xeon ???? = PII Xeon (Klamath)
Model 5 = Xeon Drake = PII Deschutes
Model 6 = Xeon ???? = PII Xeon (Dixon)

PIII Celeron:
PIII Celeron (XX) = PIII (XX)

PIII Xeon:
Model 7 = Xeon Tanner = PIII Katmai
Model 8,10 = Xeon Cascades = PIII Coppermine
Model 11 = Xeon ??? = PIII Xeon (Tualatin)

Signed-off-by: Veselin Georgiev <anrieff@gmail.com>
 2016-04-20 01:36:58 +03:00
wdlkmpx
0dc6edf925 Pentium D: more precise descriptions 
Basically:
Model = 4 -> Smithfield
Model = 6 -> Presler

Download this 16 cpu-z screenshots to verify (1.5mb):
http://s000.tinyupload.com/index.php?file_id=54246820652929080678
 2016-04-18 19:29:09 +00:00
wdlkmpx
5f420362c6 P4 Celeron: more precise descriptions 
According to wikipedia, cpu-world and some cpu-z screenshots, these processors
do have a code name and it's willamette, northwood, prescott or cedar mill

Signed-off-by: Veselin Georgiev <anrieff@gmail.com>
 2016-04-19 00:57:11 +03:00
Veselin Georgiev
281d4720d4 Fix issue #28: Windows Build error 
msrdriver.c was forgotten from Makefile.am, under the assumption that
autotools are used under *nix only. This is not true, as one could use
MinGW or cygwin.
 2016-03-10 01:14:37 +02:00
Kurt Cancemi
c694397d33 Fix X2APIC, AES, XSAVE and OSXSAVE feature detection on AMD processors 2016-01-16 10:53:28 -05:00
Xorg
c1707401e5 Recognize more AMD Trinity CPUs 2016-01-02 18:45:33 +01:00
Veselin Georgiev
7c52fba506 Fix errors and warnings on Windows (tested using MSVC 2003). 2015-11-30 13:47:40 +02:00
Veselin Georgiev
8c7b2fef63 Bump the version to 0.2.2 (and briefly describe changes since 2012). 2015-11-04 01:31:22 +02:00
Veselin Georgiev
9ce5e51cee Add cpuid_get_vendor() function to exports. 2015-10-17 03:05:45 +03:00
Veselin Georgiev
6b09bceb66 Implement cpu_msr_driver_open_core() on Mac OS X and Windows (dummies). 
On Windows, we don't have the API that Linux provides, which can be used
to query MSRs of particular CPU cores. However, the same behaviour can be
emulated. Say that the driver handle object also stores 'dedicated thread
index'. When you call 'cpu_msr_driver_open()', this index is set to -1,
so further API functions do not force which core should be executing
RDMSR code. I.e. "I don't care on which core I run".
However, if this is non-negative number, the subsequent
functions like cpu_rdmsr() are forced to pass through this core by
using temporary affinity mask.
 2015-10-17 03:00:58 +03:00
Veselin Georgiev
53fe741649 Update errors list; add error messages which had no text description. 2015-10-16 03:07:24 +03:00
Xorg
d0bb9f1249 Make some functions private 
This commit is to complete commit 7df646a2749f6ef942f9684d66fee14614a74314.
 2015-10-15 16:40:16 +02:00
Xorg
b1cff440b7 Remove cpu_vendor() function, replaced by cpuid_get_vendor() function 2015-10-15 16:40:16 +02:00
Xorg
a853fcd25b Split cpuid_basic_identify() function and add cpuid_get_vendor() function 
These changes are needed to improve cpu_vendor() function. Discussion about these changes come from here (french forum): https://forums.archlinux.fr/viewtopic.php?f=18&t=15973&e=1&view=unread#p147593
The original patch, written by Benjamin ROBIN, is available here: http://pastebin.com/5BHUiCB1
 2015-10-15 16:40:16 +02:00
Xorg
32ddb7d734 Improve code readability since recent changes in function cpu_msrinfo() 2015-10-12 15:58:11 +02:00
Xorg
11b51a105c Implement INFO_TEMPERATURE for Intel in cpu_msrinfo() 2015-10-06 15:39:51 +02:00
Xorg
f11a5b6d16 Modify INFO_MAX_MULTIPLIER for Intel in cpu_msrinfo() 2015-10-06 15:39:51 +02:00
Xorg
ce6ba819f9 Modify INFO_CUR_MULTIPLIER for Intel in cpu_msrinfo() 2015-10-06 15:39:51 +02:00