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Author SHA1 Message Date
Xorg
8fc0cc0d4a Use internal code for MSR, replace cpuid_get_vendor() by id->vendor 2016-06-04 14:13:24 +02:00
Xorg
1ef4615d8f Use cpu_id_t in cpu_msrinfo() 
It can be useful to have more informations on CPU
 2016-06-04 13:16:41 +02:00
Veselin Georgiev
5f99a4528c Change version to 0.3.0 throughout the project. Update ChangeLog. 2016-06-03 21:15:37 +03:00
Xorg
5467504680 Use cpu_ident_internal() in cpu_msrinfo() 2016-06-03 15:58:45 +02:00
Xorg
93cdd0de75 Merge upstream changes 
Conflicts:
	libcpuid/rdmsr.c
 2016-06-03 14:36:24 +02:00
Veselin Georgiev
c31b5c0ae8 Add up to 8 entries for CPUID leaf 04; push version to 0.3.0. 
This is a backwards-incompatible binary change, which increases
sizeof(cpu_raw_data_t). Specifically, the cpu_raw_data_t::intel_fn4
array is increased from 4 to 8 elements, because on recent Hasells
(Crystalwell) there is a Level 4 cache, which should be encoded in
CPUID eax=4 ecx=4. However, we were only storing levels for eax=4
for ecx <= 3. Thus the raw data didn't have the relevant info.

There will be further changes to this, specifically to store
and print the level 4 cache in cpuid_tool.
 2016-06-03 04:35:01 +03:00
Veselin Georgiev
3f36114b19 Fix a few legit warnings (passing 'int*', where 'uint64*' is expected). 2016-06-03 03:34:08 +03:00
Veselin Georgiev
a2550463a9 Reorganize library a bit. 
- Expose intel_code_t and amd_code_t enums - they are no longer
  limited to just recog_{intel,amd}.c.
- Add libcpuid_internal.h lists those enums and provides the,
  cpu_ident_internal() function, which is the same as cpu_identify(),
  but also has a third parameter - a internal_id_info_t structure,
  which holds detection internals.

All of this is intended to be used in rdmsr, which needs to know
specifics on what CPU it is running.
 2016-06-03 03:30:36 +03:00
Xorg
77575736dd Move code from cpu_msrinfo() in subfunctions 2016-05-27 14:02:24 +02:00
Veselin Georgiev
86cf1df62c Update Readme.md with documentation links. 2016-05-22 23:35:30 +03:00
Veselin Georgiev
7fd52f01d6 Ignore generated Doxyfile. 2016-05-22 23:22:57 +03:00
Veselin Georgiev
db65e9a6b0 Fix a few Doxygen warnings and errors. Beautify docs a bit. 
Also rename Doxyfile to Doxyfile.in, add it in configure and replace
version and pathspec in it with macros.
 2016-05-22 23:20:16 +03:00
Veselin Georgiev
8c629d76b4 Fix minor issues with comments/documentation. 
Also add a comment about the upcoming version 0.2.3. A date is not
stated, as this will be done when the actual release happens (and
I will collect any further patches up to that moment). I expect the
release to be over the next weekend.
 2016-05-22 22:52:58 +03:00
Veselin Georgiev
00f349a7a3 Fix issue #45: OS X compilation error 2016-05-21 16:10:39 +03:00
Veselin Georgiev
7c7a0fea8b Merge pull request #43 from X0rg/master 
Changes for MSR
 2016-05-19 22:09:51 +01:00
Xorg
b067c68073 Use unsigned type instead of uint8_t as parameter for cpu_msr_driver_open_core() 2016-05-19 08:46:19 +02:00
Veselin Georgiev
14d6a9d875 Fix cpu_clock_by_ic() for Skylake (it was 1.6 times too high). 
The reason and fix is similar to what we did previously for Bulldozer.
 2016-05-19 01:37:45 +03:00
Veselin Georgiev
7b9fe29cef Support for Skylake. 
- Detection of hle, rtm, avx512* and sha-ni instructions
- Detection for Skylake
- Add test with Skylake i5
 2016-05-19 01:37:45 +03:00
Veselin Georgiev
3a977a4f99 Add detection support for the AMD TBM instructions. Update Vishera test. 2016-05-19 01:37:45 +03:00
Xorg
c2c32a1a70 Remove unnecessary tests in cpu_rdmsr_range() 2016-05-18 20:51:13 +02:00
Xorg
85bac12db4 Drop get_bits_value() 2016-05-18 20:46:47 +02:00
Xorg
801d4c982a Fix checking of core_num in cpu_msr_driver_open_core() 2016-05-18 18:42:11 +02:00
X0rg
aaa7e155a9 Fix some warnings 
rdmsr.c:616:10: warning: comparison of 0 <= unsigned expression is always true [-Wtautological-compare]
                                if(0 <= val && val <= 7) { // Support 8 P-states
                                   ~ ^  ~~~
rdmsr.c:572:8: warning: variable 'val' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
                                if(!multiplier)
                                   ^~~~~~~~~~~
rdmsr.c:574:8: note: uninitialized use occurs here
                                if(val > 0) {
                                   ^~~
rdmsr.c:572:5: note: remove the 'if' if its condition is always true
                                if(!multiplier)
                                ^~~~~~~~~~~~~~~
rdmsr.c:541:14: note: initialize the variable 'val' to silence this warning
        uint64_t val;
                    ^
                     = 0
2 warnings generated.
 2016-05-18 18:15:39 +02:00
X0rg
5272d9f060 Add MSR support for FreeBSD 
Tested on GhostBSD (based on FreeBSD)
It should work on DragonFlyBSD (the cpuctl driver has been ported from FreeBSD)
The situation for OpenBSD and NetBSD is not clear ; not supported
 2016-05-18 18:06:23 +02:00
Xorg
6c70d53a18 Do some rearrangements in rdmsr.c file 
I need to do that to add support for FreeBSD
 2016-05-18 17:18:59 +02:00
Xorg
841c975e95 Make get_bits_value() more robust 2016-05-18 16:51:38 +02:00
Xorg
1d5ac6f23f Set cpu_rdmsr_range() and get_bits_value() as public functions 2016-05-18 16:47:06 +02:00
Xorg
9ce0158b88 Use get_bits_value() inside cpu_rdmsr_range() 2016-05-18 16:32:40 +02:00
Xorg
c9926ab6f7 Imrove cpu_rdmsr_range(), make header similar to cpu_rdmsr() 2016-05-18 14:59:55 +02:00
Xorg
b5e82df407 Add AMD support for INFO_VOLTAGE in cpu_msrinfo() 2016-05-18 14:22:24 +02:00
Veselin Georgiev
1145fdc116 Change signature of cpu_rdmsr: the msr index type changed to uint32. 2016-05-17 17:03:26 +03:00
Veselin Georgiev
f3f92402dc Remove duplication of data in lists intel_code_t / intel_bcode_str, etc. 2016-05-17 13:28:30 +03:00
wdlkmpx
04c01ad7f9 Show intel detected brand code string 
So that it's easier to test and debug
 2016-05-17 13:08:16 +03:00
wdlkmpx
be254c30ef Add 2 Intel P4 tests / Rename some tests/codenames 
Rename some codenames to keep things tidy
 2016-05-17 13:08:16 +03:00
Veselin Georgiev
2b5de90fa7 Merge pull request #41 from wdlkmpx/master 
Ability to display AMD brand code; Add AMD Champlain mobile CPU to the DB.
 2016-05-16 03:16:17 +03:00
wdlkmpx
061bd5986c Ability to display AMD brand code 
So that it's easier to test and debug

Also added AMD Champlain mobile
Processor: AMD Athlon(tm) II P320 Dual-Core Processor
 2016-05-11 21:21:02 +00:00
Veselin Georgiev
756ef8c469 Merge pull request #38 from wdlkmpx/master 
Add Arrandale mobile
 2016-05-08 16:24:02 +03:00
wdlkmpx
7aa3155fc5 Add Arrandale mobile 
Processor: Intel(R) Pentium(R) CPU        P6100  @ 2.00GHz
 2016-05-07 19:43:33 +00:00
Veselin Georgiev
f55168b953 Merge pull request #36 from wdlkmpx/master 
Recognize Dual Core (Penryn) and more Core2 processors
 2016-04-28 11:01:51 +03:00
wdlkmpx
4047785e97 Recognize Dual Core (Penryn) and more Core2 processors 
By adding a new entry to the match table

There's also a new test:
 Intel Pentium Dual-Core Mobile T4500
 Specs:
 http://www.cpu-world.com/CPUs/Pentium_Dual-Core/Intel-Pentium%20Dual-Core%20Mobile%20T4500%20AW80577GG0521MA.html
 2016-04-28 00:28:07 +00:00
Veselin Georgiev
1073370613 Related to pull request #35: Expose intel brand & model codes. 
The detected intel brand code and model code (arbitrary numbers,
related to the detection algorithm) are printed at verbosiness level
2 or higher. You can see them with `cpuid_tool --all -vv` (if running
on an Intel CPU), or, generally, when decoding Intel CPU data, e.g.
`cpuid_tool --load=tests/intel/nehalem/bloomfield.test --all -vv`.
 2016-04-26 16:29:51 +03:00
Veselin Georgiev
db6f3abc9a Merge pull request #34 from wdlkmpx/master 
Fix issue with HyperThreading status in old cpus
 2016-04-25 01:51:24 +03:00
Veselin Georgiev
b1fb7f0d85 Merge pull request #33 from x64architecture/master 
Fix AMD Feature Detection And Associativity Table
 2016-04-25 01:46:29 +03:00
wdlkmpx
f26c1151f0 Fix issue with HyperThreading status in old cpus 
Early P4 processors come with the HT flag, but that feature
is not enabled.

This makes it work the way it should.
 2016-04-24 17:28:16 +00:00
wdlkmpx
fa9640b3a2 tests: add p4 celeron willamette-128 
1.8GHz
Specs:
http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%201800%20-%20RK80531RC033128%20(BX80531P180G128).html
 2016-04-24 17:26:44 +00:00
wdlkmpx
75c3c36cbb tests: add intel p4 prescott with HT enabled 
This is from a Pentium 4 Prescott 3.20GHz processor
Specs:
http://www.cpu-world.com/CPUs/Pentium_4/Intel-Pentium%204%203.2%20GHz%20-%20RK80546PG0881M%20(BX80546PG3200E).html
 2016-04-24 17:26:03 +00:00
Kurt Cancemi
dea8a6006a Fix tests 2016-04-24 00:27:42 -04:00
Kurt Cancemi
5ca7b2deee AMD associativity table Dh should contain 96 not 92 2016-04-24 00:26:00 -04:00
Kurt Cancemi
6ea1d4c8e2 Fix PCLMULQDQ, SSE4.1, MOVBE and RDRAND detection on AMD processors 2016-04-24 00:24:31 -04:00
wdlkmpx
eb6f1a2b9a More precise descriptions for some old processors 
PII Celeron:
Model 5 = Celeron Covington = PII Deschutes
Model 6 = Celeron Mendocino = PII Dixon

PII Xeon:
Model 3 = Xeon ???? = PII Xeon (Klamath)
Model 5 = Xeon Drake = PII Deschutes
Model 6 = Xeon ???? = PII Xeon (Dixon)

PIII Celeron:
PIII Celeron (XX) = PIII (XX)

PIII Xeon:
Model 7 = Xeon Tanner = PIII Katmai
Model 8,10 = Xeon Cascades = PIII Coppermine
Model 11 = Xeon ??? = PIII Xeon (Tualatin)

Signed-off-by: Veselin Georgiev <anrieff@gmail.com>
 2016-04-20 01:36:58 +03:00