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117 commits

Author SHA1 Message Date
Xorg
d60503c211
Tests: fix path for cpuid_tool
When we use CMake, the 'cpuid_tool' binary is in the 'build' directory
2020-11-14 13:45:15 +01:00
Xorg
04c3ebe0e9
DB: add Vermeer
https://en.wikichip.org/wiki/amd/cores/vermeer
Test file converted from http://users.atw.hu/instlatx64/AuthenticAMD/AuthenticAMD0A20F10_K19_Vermeer_CPUID1.txt
2020-11-14 13:45:15 +01:00
Xorg
98c9b6ff53
DB: add Gemini Lake
https://en.wikichip.org/wiki/intel/cores/gemini_lake
Reported in X0rg/CPU-X#164
2020-11-14 13:45:15 +01:00
Xorg
672720c501
DB: add Comet Lake-U
https://en.wikipedia.org/wiki/Comet_Lake_(microprocessor)#U-series_(Medium_power)
Reported in X0rg/CPU-X#162
2020-11-14 13:45:14 +01:00
Xorg
4846161cfc
DB: add Kaby Lake-G
https://en.wikichip.org/wiki/intel/cores/kaby_lake_g
Test file converted from http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00906E9_KabylakeG_CPUID.txt
2020-11-14 13:45:14 +01:00
Xorg
77dfe98a4c
DB: add Kaby Lake Refresh
https://en.wikichip.org/wiki/intel/cores/kaby_lake_r
Core i5 8250U was detected as Coffee Lake wrongly.
Reported in X0rg/CPU-X#161
2020-11-14 13:45:14 +01:00
Veselin Georgiev
52c5f505cf Related to c2645d0. Convert all python scripts to Python 3.
As stated in discussion, Python 2 is actively being deprecated
and the fix is easy, almost automatic.
2020-05-28 19:57:30 +03:00
Xorg
9abab57bdc
Fix code consistency
Result before this patch:

Checking enum `cpu_feature_t': 113 elements; max size (CPU_FLAGS_MAX=128)... OK
Checking enum `cpu_hint_t': 1 elements; max size (CPU_HINTS_MAX=16)... OK
Checking enum `cpu_sgx_feature_t': 2 elements; max size (SGX_FLAGS_MAX=14)... OK
Finding features:
..Mismatch - cpuid_main.c:688 - `AVX512VNNI' vs `avx512_vnni'
..Mismatch - cpuid_main.c:689 - `AVX512VBMI' vs `avx512_vbmi'
..Mismatch - cpuid_main.c:690 - `AVX512VBMI2' vs `avx512_vbmi2'
  cpuid_main.c: 113 features described
Found 113 total features and 113 named features
Checking whether all features have detection code... FAILED:
..No detection code for CPU_FEATURE_SSE5
2020-05-23 18:24:30 +02:00
Xorg
7c7fd3b565
CMake: fix build on Windows 2020-05-22 22:06:34 +02:00
Xorg
1a00dac1ee
tests: fix unused-result warning in convert_instlatx64 tool 2020-05-21 19:00:26 +02:00
Xorg
7179a7b103
CMake: fix Unix install and format 2020-05-21 18:43:34 +02:00
Xorg
180154f03d
Detect AVX512VBMI and AVX512VBMI2 features on Intel CPUs
More information: https://en.wikichip.org/wiki/x86/avx-512
Resolve #134
2020-05-18 22:05:01 +02:00
Xorg
4b06a9a23e
Detect ABM feature on Intel CPUs
Resolve #144
2020-05-18 21:11:01 +02:00
Xorg
9419c573ca
Detect RDSEED/ADX/SHA_NI features on AMD CPUs
These x86 instruction set extensions are present since Zen micro-architecture
Resolve #145
2020-05-18 21:05:20 +02:00
Xorg
ef8986407f DB: add Ivy Bridge-E (Xeon) 2020-05-10 17:02:45 +00:00
Xorg
fb1deb1fef Tests: update all tests to add fields for L1I 2020-05-10 17:02:45 +00:00
Xorg
e592a83278 Tests: update to add L1I information
Related to 25d0614811
Dump of Core i5 520m from CPU-X#119
2020-05-10 17:02:45 +00:00
Xorg
6b5a1f5ea6
Tests: add amd_fn8000001dh subleaf
See e562798cec
2020-05-09 22:48:07 +02:00
Xorg
3a346d4d72
Tests: parse subleafs in convert_instlatx64
Also, it adds 0xffffffff when data is not available, so all lines are presents
2020-05-09 22:46:13 +02:00
Xorg
0b05f45e03
Remove all trailling spaces
It is annoying with some text editors
2020-05-09 17:34:07 +02:00
Xorg
8720a71b35
Tests: add Core i5 8250U
Related to X0rg/CPU-X#129
2020-05-09 14:46:59 +02:00
Veselin Georgiev
9d22c61611
Merge pull request #141 from X0rg/master
Fixes for AMD Zen 2 CPUs
2020-05-04 21:35:42 +03:00
Xorg
46e86331bb
tests: remove duplicate addresses in RAW part 2020-05-03 17:12:33 +02:00
Xorg
afbd7ae56d
tests: fix convert_instlatx64 tool 2020-05-03 17:09:54 +02:00
Xorg
848394ee46
Fix L3 cache associativity detection on AMD Zen 2 CPUs 2020-05-03 17:07:43 +02:00
eloaders
5f7f3c26cc DB: Add Threadripper (Castle Peak) 2019-12-31 10:58:20 +01:00
Veselin Georgiev
f6e4e23796 Add Xeon CLX (Cascade lake-based) using data from PR #129
Kudos to Leslie-Fang for providing it!
2019-08-09 11:18:20 +03:00
Veselin Georgiev
96810180a0
Merge pull request #126 from X0rg/master
Fix for Zen 2
2019-07-12 11:20:06 +03:00
Xorg
848354a3f1 Tests: Add more Matisse CPUs 2019-07-11 22:49:08 +02:00
Xorg
bf7f57f519 Fix SSE unit size for Zen 2 CPUs
Related to #125
2019-07-11 22:29:27 +02:00
Veselin Georgiev
ab3bc3defe
Merge pull request #125 from X0rg/master
More test files for AMD Zen CPUs
2019-07-11 08:34:24 +03:00
Xorg
5aedd53624 Add more test files for AMD Zen CPUs
Dumps found on http://instlatx64.atw.hu/
2019-07-07 20:03:45 +02:00
Xorg
081c354d17 DB: Add AMD Ryzen 3000 2019-07-07 19:38:46 +02:00
hygonsoc
9f0012b74b add Hygon Dhyana C86 7seris test file
Signed-off-by: hygonsoc <hygonsoc@gmail.com>
2019-04-13 23:08:41 +08:00
Xorg
3a8343c77c Fix Ryzen core count calculation
Close X0rg/CPU-X#86
2018-11-03 21:30:01 +01:00
Xorg
7358232cc4 DB: Add Kaby Lake-U 2018-09-23 22:06:53 +02:00
Xorg
218015a983 Tests: Add Pentium 4405U 2018-08-08 15:02:08 +02:00
Xorg
9c382e33b3 DB: Add Skylake-X CPUs 2018-08-08 14:51:38 +02:00
Xorg
c2645d0dff Force Python 2.7 in all Python scripts
/usr/bin/python is Python 3.7 on Arch Linux, so it doesn't work
2018-08-08 13:54:14 +02:00
Veselin Georgiev
45d04a9e4a Fix P-III Celeron misdetected as plain P-III (misreport id #8)
Reported via http://libcpuid.sourceforge.net/bugreport.php
The test in particular has no brand string, which was causing the
misdetection (as is the case with a lot of other models, libcpuid
relies on accurate brand string being programmed by the BIOS in
order to do the detection).

The actual CPU was a Pentium-III based Celeron (SL54Q), but it
was detected as "Pentium III (Coppermine)".

A bit of historical trivia: for the related Tualatin models, if
the BIOS doesn't enter a brand string, there might be NO WAY to
tell a regular P-3 and a P-3 Celeron apart: P-3s have variants
with 256KiB and 512KiB L2 cache, while the Celerons are 256 KiB, so
a 256KiB regular P3 is no different than its corresponding Celeron.
Only the FSB is different, but there's no way to detect this via
CPUID.

For the Coppermines its an easier case: Celerons are always 128KiB,
and Pentia are 256KiB, so I've added this distinction in the tables.
2018-05-02 11:05:25 +03:00
anonymous
a9c739d312 virtual machine test 2018-04-21 01:00:30 +00:00
Xorg
f1e1ad58e7 DB: Add Raven Ridge APUs and Threadripper CPUs 2018-03-20 19:52:40 +01:00
Veselin Georgiev
f178de98f3 Fix issue #104: Intel Coffee Lake and Kaby Lake
Add support for detecting Coffee Lake i[357]s. Test included.
Thanks to @X0rg for reporting and to @exdeus for the raw cpu data.

The detection here relies on Kaby and Coffee lakes having different
number of cores for the equivalent brand:

i3: 2 cores in Kaby, 4 in Coffee
i5 and i7: 4 cores in Kaby, 6 in Coffee.
2018-02-04 13:37:36 +02:00
Veselin Georgiev
2f4c21e3a7 Fixed issue #103: Intel Xeon Scalable not recognised "code name".
Table entry added, test added, thanks to @phprus for reporting.
2018-01-28 02:06:37 +02:00
Veselin Georgiev
94507ded22 Fixed issue #86: AMD Ryzen support
Also add a test of Ryzen 7 (1800X).
2017-03-20 02:28:28 +02:00
Xorg
bb4141a25a Enforce Python 2.7 in tests 2017-03-12 09:34:26 +01:00
Veselin Georgiev
86bf8e8269 Fixed issue #81: Misdiagnosis microarchitecture for i3-3220T
It's a mystery to me why this CPU doesn't have RdRand.
A quick-n-dirty workaround is inserted to fix that.
2017-02-10 03:48:00 +02:00
Veselin Georgiev
e36a08deb9 Fixed issue #76: Skylake Core i5 badly recognized
Add support for detecting RDSEED and ADX instructions.
Use RDSEED instead of RTM to ascertain that the CPU is
Broadwell or later in recog_intel.c. This fixes
detection discrepancies on Linux, where RTM is not
made available (I guess there's no kernel support for it).

The two new flags are also now detected in the Broadwell
and Skylake tests. Update them as well.
2016-10-25 05:16:44 +03:00
Veselin Georgiev
3f38efb6c9 Fixed issue #54: Intel Atom N450 not recognised properly
Improved parsing of brand strings for both Pineview and Cedarview
Atoms.

Add tests for both the Pineview Atom, and also Broadwell-E
(forgotten in a previous commit).
2016-08-24 15:06:40 +03:00
Veselin Georgiev
87f3052a7b Add a test with L4 cache (courtesy of @phprus).
The test is a snapshot of a Haswell i7 (a.k.a. "Crystalwell") core.
This is the only test in the test DB right now which has lines for
L4 cache size, associativity and cacheline size different than "-1".

Also update create_test.py to accommodate for the new fields.
2016-07-07 00:53:03 +03:00