Veselin Georgiev
870c4b72ae
Merge pull request #27 from x64architecture/master
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Fix X2APIC, AES, XSAVE and OSXSAVE feature detection on AMD processors
2016-01-17 03:04:05 +02:00
Kurt Cancemi
c5493f8008
Fix tests
2016-01-16 10:55:08 -05:00
Kurt Cancemi
c694397d33
Fix X2APIC, AES, XSAVE and OSXSAVE feature detection on AMD processors
2016-01-16 10:53:28 -05:00
Veselin Georgiev
78fef29bd6
Merge pull request #26 from X0rg/request
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Recognize more AMD Trinity CPUs
2016-01-03 11:47:13 +02:00
Xorg
c1707401e5
Recognize more AMD Trinity CPUs
2016-01-02 18:45:33 +01:00
Veselin Georgiev
7c52fba506
Fix errors and warnings on Windows (tested using MSVC 2003).
2015-11-30 13:47:40 +02:00
Veselin Georgiev
535ec64dd9
Add ucbench to the users list.
2015-11-04 01:35:06 +02:00
Veselin Georgiev
8b64940a0a
Convert README to markdown.
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The old file is only kept as required by autotools.
2015-11-04 01:31:23 +02:00
Veselin Georgiev
0f679a589f
Update readme, include "users" info as suggested in issue #24 .
2015-11-04 01:31:23 +02:00
Veselin Georgiev
8c7b2fef63
Bump the version to 0.2.2 (and briefly describe changes since 2012).
2015-11-04 01:31:22 +02:00
Veselin Georgiev
9ce5e51cee
Add cpuid_get_vendor() function to exports.
2015-10-17 03:05:45 +03:00
Veselin Georgiev
6b09bceb66
Implement cpu_msr_driver_open_core() on Mac OS X and Windows (dummies).
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On Windows, we don't have the API that Linux provides, which can be used
to query MSRs of particular CPU cores. However, the same behaviour can be
emulated. Say that the driver handle object also stores 'dedicated thread
index'. When you call 'cpu_msr_driver_open()', this index is set to -1,
so further API functions do not force which core should be executing
RDMSR code. I.e. "I don't care on which core I run".
However, if this is non-negative number, the subsequent
functions like cpu_rdmsr() are forced to pass through this core by
using temporary affinity mask.
2015-10-17 03:00:58 +03:00
Veselin Georgiev
3b713ff7a2
Update cpuid_tool to print the new supported MSR info.
2015-10-16 03:07:55 +03:00
Veselin Georgiev
53fe741649
Update errors list; add error messages which had no text description.
2015-10-16 03:07:24 +03:00
Veselin Georgiev
08615d76fe
Merge pull request #22 from X0rg/pull_request
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Some new features for function cpu_msrinfo()
2015-10-16 02:16:35 +03:00
Xorg
d0bb9f1249
Make some functions private
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This commit is to complete commit 7df646a2749f6ef942f9684d66fee14614a74314.
2015-10-15 16:40:16 +02:00
Xorg
b1cff440b7
Remove cpu_vendor() function, replaced by cpuid_get_vendor() function
2015-10-15 16:40:16 +02:00
Xorg
a853fcd25b
Split cpuid_basic_identify() function and add cpuid_get_vendor() function
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These changes are needed to improve cpu_vendor() function. Discussion about these changes come from here (french forum): https://forums.archlinux.fr/viewtopic.php?f=18&t=15973&e=1&view=unread#p147593
The original patch, written by Benjamin ROBIN, is available here: http://pastebin.com/5BHUiCB1
2015-10-15 16:40:16 +02:00
Xorg
32ddb7d734
Improve code readability since recent changes in function cpu_msrinfo()
2015-10-12 15:58:11 +02:00
Xorg
11b51a105c
Implement INFO_TEMPERATURE for Intel in cpu_msrinfo()
2015-10-06 15:39:51 +02:00
Xorg
f11a5b6d16
Modify INFO_MAX_MULTIPLIER for Intel in cpu_msrinfo()
2015-10-06 15:39:51 +02:00
Xorg
ce6ba819f9
Modify INFO_CUR_MULTIPLIER for Intel in cpu_msrinfo()
2015-10-06 15:39:51 +02:00
Xorg
42e8d6f019
Add INFO_BCLK in cpu_msrinfo()
2015-10-06 15:39:51 +02:00
Xorg
fc72fdee74
Add INFO_VOLTAGE in cpu_msrinfo()
2015-10-06 15:39:51 +02:00
Xorg
36f24eae94
Import some functions from i7z
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Get_Bits_Value() is renamed in get_bits_value(), imported from
5023138d7c/helper_functions.c (L48)
get_msr_value() is renamed in cpu_rdmsr_range(), imported from
5023138d7c/helper_functions.c (L234)
2015-10-06 15:39:23 +02:00
Xorg
6c8dfd306f
Add function cpu_vendor() to define vendor-specific code
2015-10-06 15:39:23 +02:00
Xorg
79fcdba98e
Add function cpu_msr_driver_open_core()
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This function is similar to cpu_msr_driver_open(), but with core number as parameter
For Linux, core number was always 0. To be able to get all core temp/voltage, we need to set the core number.
2015-10-06 15:39:03 +02:00
Veselin Georgiev
4e3b633bee
Fix tests due to X0rg's codename changes.
2015-09-13 18:38:59 +03:00
Veselin Georgiev
4a72a734aa
Correctly recognize Sandy Bridge-E Xeons.
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They have L3 cache, and the detection code incorrectly assumed this is a Xeon
Irwindale variant due to an old and no longer valid classification check.
Correctly handle the XEON_IRWIN subcode and add an entry in the matchtable
to fix Sandy Bridge-E Xeon.
2015-09-13 18:36:23 +03:00
Xorg
f642b79047
Add support for newer Intel CPUs
2015-09-13 18:21:53 +03:00
Xorg
80e6bca100
Some restructuring for Intel Nehalem CPUs and newer
2015-09-13 18:13:43 +03:00
Xorg
505102370b
Add support for more AMD CPUs
2015-09-13 18:13:43 +03:00
Veselin Georgiev
153a6a7c7d
Add support for detecting Xeon Ivy Bridge.
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Based on report #7 from the sourceforge bugtrack page.
2015-09-03 09:33:38 +03:00
Veselin Georgiev
81128e2384
Merge pull request #20 from cosmy1/master
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MSVC warning fix
2015-07-31 15:26:43 +03:00
cosmy1
4dbcaaf47d
Update libcpuid_util.c
2015-07-31 14:21:41 +02:00
cosmy1
fe63724d53
MSVC warning fix
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using _strdup instead of strdup on Visual C++
2015-07-31 14:20:58 +02:00
Veselin Georgiev
01ece12668
Merge pull request #19 from x64architecture/master
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Fix maximum extended level check in load_amd_features()
2015-05-18 00:12:40 +03:00
Kurt Cancemi
da68fd8bf8
Fix max extended level check
2015-05-17 17:06:05 -04:00
Veselin Georgiev
2834683640
Fixed issue #18 : Win64 issues
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- move the INLINE_ASM_SUPPORTED guards outside the body of exec_cpuid, as
suggested by Genoil;
- copy the asm code of busy_sse_loop to masm-x64.asm. Some fixup was
required, because the microsoft calling convention doesn't expect
xmm6 & xmm7 to be clobbered in functions.
Confirmed that --clock-ic from cpuid_tool works with the resulting library.
2015-05-07 17:16:46 +02:00
Veselin Georgiev
2722a10738
Address lintian warnings/errors. Fixes issue #16 .
2015-04-21 12:23:51 -04:00
Veselin Georgiev
6b38edcc88
Fixed issue #13 : unused substitution variable ${misc:Pre-Depends}
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Fixed by adding that dependency to debian/control.
2015-04-21 09:56:07 -04:00
Veselin Georgiev
812b89bcb8
'make test' ported to run on Python 2.5 as well.
2015-04-20 17:22:11 +03:00
Veselin Georgiev
8d738e8ef5
Formatting changes to library description.
2015-04-20 11:00:13 +03:00
Veselin Georgiev
51bb74ad29
Merge pull request #15 from gdbdzgd/debian-jessie
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fix lintian errors checking libcpuid.deb
2015-04-20 10:54:14 +03:00
Zhang, Guodong
d0592df57b
fix lintian errors checking libcpuid.deb
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https://github.com/anrieff/libcpuid/issues/14
modified: debian/control
renamed: debian/libcpuid-dev.install -> debian/libcpuid11-dev.install
renamed: debian/libcpuid.install -> debian/libcpuid11.install
Signed-off-by: Zhang, Guodong <gdzhang@linx-info.com>
2015-04-20 11:27:00 +08:00
Veselin Georgiev
3bcb21a1ba
Post-merge: fill in the blanks in the debian directory; some cleanup too.
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Remove the two README.* files, as there isn't anything extraordinary with
building this package.
2015-04-20 02:29:53 +03:00
Veselin Georgiev
365f7d25ca
Merge pull request #12 from gdbdzgd/debian
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add build support for debian jessie
2015-04-20 02:14:08 +03:00
Zhang, Guodong
efe0f6fe03
Merge remote-tracking branch 'remotes/upstream/master'
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Signed-off-by: Zhang, Guodong <gdzhang@linx-info.com>
2015-04-18 09:17:53 +08:00
Zhang, Guodong
5d2c66c3b3
add build support for debian jessie
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dpkg-buildpackage build debian packages
new file: debian/README.Debian
new file: debian/README.source
new file: debian/changelog
new file: debian/compat
new file: debian/control
new file: debian/copyright
new file: debian/docs
new file: debian/libcpuid-dev.install
new file: debian/libcpuid-doc.docs
new file: debian/libcpuid.install
new file: debian/rules
new file: debian/source/format
Signed-off-by: Zhang, Guodong <gdzhang@linx-info.com>
2015-04-18 08:51:07 +08:00
Veselin Georgiev
94fc6ae36a
Modify the table matcher a bit. Put some weights on the different fields.
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Priously all fields in the matchtable were treated equal in importance.
With this change, the cache size a taken with half the weight in the decision.
Also add detection entries for some more recent Haswells, and the respective
tests. These are an i5 Haswell from a Mac Book Pro, and a i7 Haswel from
Thinkpad T540.
2015-04-17 01:21:30 +03:00