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12 commits

Author SHA1 Message Date
Xorg
ecd45bb276
Tests: add more Zen2 tests from InstLatx64 2022-02-06 11:52:55 +01:00
Xorg
5ce462c32c
DB: add Lucienne
https://en.wikichip.org/wiki/amd/cores/lucienne
Fix X0rg/CPU-X#209
2022-02-06 11:29:46 +01:00
Xorg
9419c573ca
Detect RDSEED/ADX/SHA_NI features on AMD CPUs
These x86 instruction set extensions are present since Zen micro-architecture
Resolve #145
2020-05-18 21:05:20 +02:00
Xorg
fb1deb1fef Tests: update all tests to add fields for L1I 2020-05-10 17:02:45 +00:00
Xorg
6b5a1f5ea6
Tests: add amd_fn8000001dh subleaf
See e562798cec
2020-05-09 22:48:07 +02:00
Veselin Georgiev
9d22c61611
Merge pull request #141 from X0rg/master
Fixes for AMD Zen 2 CPUs
2020-05-04 21:35:42 +03:00
Xorg
46e86331bb
tests: remove duplicate addresses in RAW part 2020-05-03 17:12:33 +02:00
Xorg
848394ee46
Fix L3 cache associativity detection on AMD Zen 2 CPUs 2020-05-03 17:07:43 +02:00
eloaders
5f7f3c26cc DB: Add Threadripper (Castle Peak) 2019-12-31 10:58:20 +01:00
Xorg
848354a3f1 Tests: Add more Matisse CPUs 2019-07-11 22:49:08 +02:00
Xorg
bf7f57f519 Fix SSE unit size for Zen 2 CPUs
Related to #125
2019-07-11 22:29:27 +02:00
Xorg
081c354d17 DB: Add AMD Ryzen 3000 2019-07-07 19:38:46 +02:00