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Merge branch 'main' into doc/cutscene_index

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feacur 2025-01-11 23:26:20 +01:00
commit aacefa3ee1
414 changed files with 32553 additions and 11357 deletions
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2
.clang-tidy
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@ -1,6 +1,6 @@
Checks: '-*,readability-braces-around-statements,readability-inconsistent-declaration-parameter-name'
WarningsAsErrors: ''
HeaderFilterRegex: '(src|include)\/.*\.h$'
HeaderFilterRegex: '(src|include)\/.*(\.h|\.inc\.c)$'
FormatStyle: 'file'
CheckOptions:
# Require argument names to match exactly (instead of allowing a name to be a prefix/suffix of another)

329
Makefile
View file

@ -41,6 +41,8 @@ VERSION ?= gc-eu-mq-dbg
N_THREADS ?= $(shell nproc)
# Check code syntax with host compiler.
RUN_CC_CHECK ?= 1
# If DEBUG_OBJECTS is 1, produce additional debugging files such as objdump output or raw binaries for assets
DEBUG_OBJECTS ?= 0
# Set prefix to mips binutils binaries (mips-linux-gnu-ld => 'mips-linux-gnu-') - Change at your own risk!
# In nearly all cases, not having 'mips-linux-gnu-*' binaries on the PATH indicates missing dependencies.
MIPS_BINUTILS_PREFIX ?= mips-linux-gnu-
@ -55,10 +57,6 @@ N64_EMULATOR ?=
# This may also be used to disable debug features on debug ROMs by setting DEBUG_FEATURES to 0
# DEBUG_FEATURES ?= 1
CFLAGS ?=
CPPFLAGS ?=
CPP_DEFINES ?=
# Version-specific settings
REGIONAL_CHECKSUM := 0
ifeq ($(VERSION),ntsc-1.0)
@ -66,6 +64,7 @@ ifeq ($(VERSION),ntsc-1.0)
REGION ?= JP
PLATFORM := N64
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd44
BUILD_DATE := 98-10-21
BUILD_TIME := 04:56:31
REVISION := 0
@ -74,6 +73,7 @@ else ifeq ($(VERSION),ntsc-1.1)
REGION ?= JP
PLATFORM := N64
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd44
BUILD_DATE := 98-10-26
BUILD_TIME := 10:58:45
REVISION := 1
@ -81,6 +81,7 @@ else ifeq ($(VERSION),pal-1.0)
REGION ?= EU
PLATFORM := N64
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd44
BUILD_DATE := 98-11-10
BUILD_TIME := 14:34:22
REVISION := 0
@ -89,6 +90,7 @@ else ifeq ($(VERSION),ntsc-1.2)
REGION ?= JP
PLATFORM := N64
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd44
BUILD_DATE := 98-11-12
BUILD_TIME := 18:17:03
REVISION := 2
@ -96,6 +98,7 @@ else ifeq ($(VERSION),pal-1.1)
REGION ?= EU
PLATFORM := N64
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd44
BUILD_DATE := 98-11-18
BUILD_TIME := 17:36:49
REVISION := 1
@ -103,6 +106,7 @@ else ifeq ($(VERSION),gc-jp)
REGION ?= JP
PLATFORM := GC
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd022j
BUILD_DATE := 02-10-29
BUILD_TIME := 23:49:53
REVISION := 15
@ -110,6 +114,7 @@ else ifeq ($(VERSION),gc-jp-mq)
REGION ?= JP
PLATFORM := GC
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd022j
BUILD_DATE := 02-10-30
BUILD_TIME := 00:15:15
REVISION := 15
@ -117,6 +122,7 @@ else ifeq ($(VERSION),gc-us)
REGION ?= US
PLATFORM := GC
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd022j
BUILD_DATE := 02-12-19
BUILD_TIME := 13:28:09
REVISION := 15
@ -124,6 +130,7 @@ else ifeq ($(VERSION),gc-us-mq)
REGION ?= US
PLATFORM := GC
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd022j
BUILD_DATE := 02-12-19
BUILD_TIME := 14:05:42
REVISION := 15
@ -131,6 +138,7 @@ else ifeq ($(VERSION),gc-eu-mq-dbg)
REGION ?= EU
PLATFORM := GC
DEBUG_FEATURES ?= 1
BUILD_CREATOR := zelda@srd022j
BUILD_DATE := 03-02-21
BUILD_TIME := 00:16:31
REVISION := 15
@ -138,6 +146,7 @@ else ifeq ($(VERSION),gc-eu)
REGION ?= EU
PLATFORM := GC
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd022j
BUILD_DATE := 03-02-21
BUILD_TIME := 20:12:23
REVISION := 15
@ -145,6 +154,7 @@ else ifeq ($(VERSION),gc-eu-mq)
REGION ?= EU
PLATFORM := GC
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd022j
BUILD_DATE := 03-02-21
BUILD_TIME := 20:37:19
REVISION := 15
@ -152,23 +162,23 @@ else ifeq ($(VERSION),gc-jp-ce)
REGION ?= JP
PLATFORM := GC
DEBUG_FEATURES ?= 0
BUILD_CREATOR := zelda@srd022j
BUILD_DATE := 03-10-08
BUILD_TIME := 21:53:00
REVISION := 15
else ifeq ($(VERSION),ique-cn)
COMPARE := 0
REGION ?= US
PLATFORM := IQUE
DEBUG_FEATURES ?= 0
BUILD_CREATOR := build@toad.routefree.com
BUILD_DATE := 03-10-22
BUILD_TIME := 16:23:19
REVISION := 0
else
$(error Unsupported version $(VERSION))
endif
ifeq ($(PLATFORM),N64)
BUILD_CREATOR := zelda@srd44
LIBULTRA_VERSION := I
LIBULTRA_PATCH := 1
else
BUILD_CREATOR := zelda@srd022j
LIBULTRA_VERSION := L
LIBULTRA_PATCH := 0
endif
# ORIG_COMPILER cannot be combined with a non-IDO compiler. Check for this case and error out if found.
ifneq ($(COMPILER),ido)
ifeq ($(ORIG_COMPILER),1)
@ -194,22 +204,31 @@ EXTRACTED_DIR := extracted/$(VERSION)
VENV := .venv
MAKE = make
CPPFLAGS += -P -xc -fno-dollars-in-identifiers
ifeq ($(PLATFORM),N64)
CPP_DEFINES += -DPLATFORM_N64=1 -DPLATFORM_GC=0 -DPLATFORM_IQUE=0
LIBULTRA_VERSION := I
LIBULTRA_PATCH := 1
else ifeq ($(PLATFORM),GC)
CPP_DEFINES += -DPLATFORM_N64=0 -DPLATFORM_GC=1 -DPLATFORM_IQUE=0
LIBULTRA_VERSION := L
LIBULTRA_PATCH := 0
else ifeq ($(PLATFORM),IQUE)
CPP_DEFINES += -DPLATFORM_N64=0 -DPLATFORM_GC=0 -DPLATFORM_IQUE=1
LIBULTRA_VERSION := L
LIBULTRA_PATCH := 0
else
$(error Unsupported platform $(PLATFORM))
endif
# Converts e.g. ntsc-1.0 to NTSC_1_0
VERSION_MACRO := $(shell echo $(VERSION) | tr a-z-. A-Z__)
CPP_DEFINES += -DOOT_VERSION=$(VERSION_MACRO) -DOOT_REVISION=$(REVISION)
CPP_DEFINES += -DOOT_REGION=REGION_$(REGION)
CPP_DEFINES += -DBUILD_CREATOR="\"$(BUILD_CREATOR)\"" -DBUILD_DATE="\"$(BUILD_DATE)\"" -DBUILD_TIME="\"$(BUILD_TIME)\""
CPP_DEFINES += -DLIBULTRA_VERSION=LIBULTRA_VERSION_$(LIBULTRA_VERSION)
CPP_DEFINES += -DLIBULTRA_PATCH=$(LIBULTRA_PATCH)
ifeq ($(PLATFORM),N64)
CPP_DEFINES += -DPLATFORM_N64=1 -DPLATFORM_GC=0
else ifeq ($(PLATFORM),GC)
CPP_DEFINES += -DPLATFORM_N64=0 -DPLATFORM_GC=1
else
$(error Unsupported platform $(PLATFORM))
ifeq ($(PLATFORM),IQUE)
CPP_DEFINES += -DBBPLAYER
endif
ifeq ($(DEBUG_FEATURES),1)
@ -219,6 +238,7 @@ else
CPP_DEFINES += -DDEBUG_FEATURES=0 -DNDEBUG
OPTFLAGS := -O2 -g3
endif
ASOPTFLAGS := -O1
ifeq ($(OS),Windows_NT)
DETECTED_OS=windows
@ -241,9 +261,11 @@ endif
# Detect compiler and set variables appropriately.
ifeq ($(COMPILER),gcc)
CC := $(MIPS_BINUTILS_PREFIX)gcc
CCAS := $(CC) -x assembler-with-cpp
else ifeq ($(COMPILER),ido)
CC := tools/ido_recomp/$(DETECTED_OS)/7.1/cc
CC_OLD := tools/ido_recomp/$(DETECTED_OS)/5.3/cc
CCAS := $(CC_OLD)
else
$(error Unsupported compiler. Please use either ido or gcc as the COMPILER variable.)
endif
@ -256,15 +278,28 @@ ifeq ($(ORIG_COMPILER),1)
$(error Please install qemu-irix package or set QEMU_IRIX env var to the full qemu-irix binary path)
endif
endif
CC = $(QEMU_IRIX) -L tools/ido7.1_compiler tools/ido7.1_compiler/usr/bin/cc
CC_OLD = $(QEMU_IRIX) -L tools/ido5.3_compiler tools/ido5.3_compiler/usr/bin/cc
CC := $(QEMU_IRIX) -L tools/ido7.1_compiler tools/ido7.1_compiler/usr/bin/cc
CC_OLD := $(QEMU_IRIX) -L tools/ido5.3_compiler tools/ido5.3_compiler/usr/bin/cc
CCAS := $(CC)
endif
# EGCS Compiler
EGCS_PREFIX := tools/egcs/$(DETECTED_OS)/
EGCS_CC := $(EGCS_PREFIX)gcc -B $(EGCS_PREFIX)
EGCS_CCAS := $(EGCS_CC) -x assembler-with-cpp
AS := $(MIPS_BINUTILS_PREFIX)as
LD := $(MIPS_BINUTILS_PREFIX)ld
OBJCOPY := $(MIPS_BINUTILS_PREFIX)objcopy
OBJDUMP := $(MIPS_BINUTILS_PREFIX)objdump
NM := $(MIPS_BINUTILS_PREFIX)nm
STRIP := $(MIPS_BINUTILS_PREFIX)strip
# Command prefix to preprocess a file before running the compiler
PREPROCESS :=
# Command to patch certain object files after they are built
POSTPROCESS_OBJ := @:
# The default iconv on macOS has some differences from GNU iconv, so we use the Homebrew version instead
ifeq ($(UNAME_S),Darwin)
@ -307,34 +342,45 @@ SEQ_CPPFLAGS := -D_LANGUAGE_ASEQ -DMML_VERSION=MML_VERSION_OOT $(CPP_DEFINES) -
SBCFLAGS := --matching
SFCFLAGS := --matching
CFLAGS += $(CPP_DEFINES)
CPPFLAGS += $(CPP_DEFINES)
# Extra debugging steps
ifeq ($(DEBUG_OBJECTS),1)
OBJDUMP_CMD = @$(OBJDUMP) $(OBJDUMP_FLAGS) $@ > $(@:.o=.s)
OBJCOPY_CMD = @$(OBJCOPY) -O binary $@ $(@:.o=.bin)
else
OBJDUMP_CMD = @:
OBJCOPY_CMD = @:
endif
ifeq ($(COMPILER),gcc)
OPTFLAGS := -Os -ffast-math -fno-unsafe-math-optimizations
endif
GBI_DEFINES := -DF3DEX_GBI_2
ifeq ($(PLATFORM),GC)
ifneq ($(PLATFORM),N64)
GBI_DEFINES += -DF3DEX_GBI_PL -DGBI_DOWHILE
endif
ifeq ($(DEBUG_FEATURES),1)
GBI_DEFINES += -DGBI_DEBUG
endif
CFLAGS += $(GBI_DEFINES)
ASFLAGS := -march=vr4300 -32 -no-pad-sections -Iinclude -I$(EXTRACTED_DIR)
CPPFLAGS += -P -xc -fno-dollars-in-identifiers $(CPP_DEFINES)
ASFLAGS += -march=vr4300 -32 -no-pad-sections -Iinclude -I$(EXTRACTED_DIR)
ifeq ($(COMPILER),gcc)
CFLAGS += -G 0 -nostdinc $(INC) -march=vr4300 -mfix4300 -mabi=32 -mno-abicalls -mdivide-breaks -fno-PIC -fno-common -ffreestanding -fbuiltin -fno-builtin-sinf -fno-builtin-cosf $(CHECK_WARNINGS) -funsigned-char
CFLAGS += $(CPP_DEFINES) $(GBI_DEFINES) -G 0 -nostdinc $(INC) -march=vr4300 -mfix4300 -mabi=32 -mno-abicalls -mdivide-breaks -fno-PIC -fno-common -ffreestanding -funsigned-char -fbuiltin -fno-builtin-sinf -fno-builtin-cosf $(CHECK_WARNINGS)
CCASFLAGS += $(CPP_DEFINES) $(GBI_DEFINES) -G 0 -nostdinc $(INC) -march=vr4300 -mfix4300 -mabi=32 -mno-abicalls -fno-PIC -fno-common -Wa,-no-pad-sections
MIPS_VERSION := -mips3
else
# Suppress warnings for wrong number of macro arguments (to fake variadic
# macros) and Microsoft extensions such as anonymous structs (which the
# compiler does support but warns for their usage).
CFLAGS += -G 0 -non_shared -fullwarn -verbose -Xcpluscomm $(INC) -Wab,-r4300_mul -woff 516,609,649,838,712,807
CFLAGS += $(CPP_DEFINES) $(GBI_DEFINES) -G 0 -non_shared -fullwarn -verbose -Xcpluscomm $(INC) -Wab,-r4300_mul -woff 516,609,649,838,712,807
CCASFLAGS += $(CPP_DEFINES) $(GBI_DEFINES) -G 0 -non_shared -fullwarn -verbose -Xcpluscomm $(INC) -Wab,-r4300_mul -woff 516,609,649,838,712,807 -o32
EGCS_CFLAGS += $(CPP_DEFINES) $(GBI_DEFINES) -G 0 -nostdinc $(INC) -mcpu=vr4300 -mabi=32 -mgp32 -mfp32 -fno-PIC
MIPS_VERSION := -mips2
EGCS_CCASFLAGS := -Wall -nostdinc $(CPP_DEFINES) $(INC) -c -G 0 -Wa,-irix-symtab -D_ABIO32=1 -D_ABI64=3 -D_MIPS_SIM_ABI64=_ABI64 -D_MIPS_SIM_ABI32=_ABIO32 -DMIPSEB -D_LANGUAGE_ASSEMBLY -mabi=32 -fno-PIC -non_shared -mcpu=4300 -mfix4300
EGCS_ASOPTFLAGS :=
endif
ifeq ($(COMPILER),ido)
@ -365,11 +411,8 @@ LDSCRIPT := $(ROM:.z64=.ld)
# description of ROM segments
SPEC := spec
ifeq ($(COMPILER),ido)
SRC_DIRS := $(shell find src -type d -not -path src/gcc_fix)
else
SRC_DIRS := $(shell find src -type d)
endif
UNDECOMPILED_DATA_DIRS := $(shell find data -type d)
ifneq ($(wildcard $(EXTRACTED_DIR)/assets/audio),)
SAMPLE_EXTRACT_DIRS := $(shell find $(EXTRACTED_DIR)/assets/audio/samples -type d)
@ -445,32 +488,19 @@ ASSET_BIN_DIRS := $(ASSET_BIN_DIRS_EXTRACTED) $(ASSET_BIN_DIRS_COMMITTED)
ASSET_FILES_BIN_EXTRACTED := $(foreach dir,$(ASSET_BIN_DIRS_EXTRACTED),$(wildcard $(dir)/*.bin))
ASSET_FILES_BIN_COMMITTED := $(foreach dir,$(ASSET_BIN_DIRS_COMMITTED),$(wildcard $(dir)/*.bin))
ASSET_FILES_OUT := $(foreach f,$(ASSET_FILES_BIN_EXTRACTED:.bin=.bin.inc.c),$(f:$(EXTRACTED_DIR)/%=$(BUILD_DIR)/%)) \
$(foreach f,$(ASSET_FILES_BIN_COMMITTED:.bin=.bin.inc.c),$(BUILD_DIR)/$f) \
$(foreach f,$(wildcard assets/text/*.c),$(BUILD_DIR)/$(f:.c=.o))
$(foreach f,$(ASSET_FILES_BIN_COMMITTED:.bin=.bin.inc.c),$(BUILD_DIR)/$f)
UNDECOMPILED_DATA_DIRS := $(shell find data -type d)
# Find all .o files included in the spec
SPEC_O_FILES := $(shell $(CPP) $(CPPFLAGS) $(SPEC) | $(BUILD_DIR_REPLACE) | sed -n -E 's/^[ \t]*include[ \t]*"([a-zA-Z0-9/_.-]+\.o)"/\1/p')
BASEROM_BIN_FILES := $(wildcard $(EXTRACTED_DIR)/baserom/*)
# source files
ASSET_C_FILES_EXTRACTED := $(filter-out %.inc.c,$(foreach dir,$(ASSET_BIN_DIRS_EXTRACTED),$(wildcard $(dir)/*.c)))
ASSET_C_FILES_COMMITTED := $(filter-out %.inc.c,$(foreach dir,$(ASSET_BIN_DIRS_COMMITTED),$(wildcard $(dir)/*.c)))
SRC_C_FILES := $(filter-out %.inc.c,$(foreach dir,$(SRC_DIRS),$(wildcard $(dir)/*.c)))
S_FILES := $(foreach dir,$(SRC_DIRS) $(UNDECOMPILED_DATA_DIRS),$(wildcard $(dir)/*.s))
O_FILES := $(foreach f,$(S_FILES:.s=.o),$(BUILD_DIR)/$f) \
$(foreach f,$(SRC_C_FILES:.c=.o),$(BUILD_DIR)/$f) \
$(foreach f,$(ASSET_C_FILES_EXTRACTED:.c=.o),$(f:$(EXTRACTED_DIR)/%=$(BUILD_DIR)/%)) \
$(foreach f,$(ASSET_C_FILES_COMMITTED:.c=.o),$(BUILD_DIR)/$f) \
$(foreach f,$(BASEROM_BIN_FILES),$(BUILD_DIR)/baserom/$(notdir $f).o) \
$(BUILD_DIR)/src/code/z_message_z_game_over.o
OVL_RELOC_FILES := $(shell $(CPP) $(CPPFLAGS) $(SPEC) | $(BUILD_DIR_REPLACE) | grep -o '[^"]*_reloc.o' )
# Split out reloc files
O_FILES := $(filter-out %_reloc.o,$(SPEC_O_FILES))
OVL_RELOC_FILES := $(filter %_reloc.o,$(SPEC_O_FILES))
# Automatic dependency files
# (Only asm_processor dependencies and reloc dependencies are handled for now)
DEP_FILES := $(O_FILES:.o=.asmproc.d) $(OVL_RELOC_FILES:.o=.d)
TEXTURE_FILES_PNG_EXTRACTED := $(foreach dir,$(ASSET_BIN_DIRS_EXTRACTED),$(wildcard $(dir)/*.png))
TEXTURE_FILES_PNG_COMMITTED := $(foreach dir,$(ASSET_BIN_DIRS_COMMITTED),$(wildcard $(dir)/*.png))
TEXTURE_FILES_JPG_EXTRACTED := $(foreach dir,$(ASSET_BIN_DIRS_EXTRACTED),$(wildcard $(dir)/*.jpg))
@ -482,7 +512,8 @@ TEXTURE_FILES_OUT := $(foreach f,$(TEXTURE_FILES_PNG_EXTRACTED:.png=.inc.c),$(f:
# create build directories
$(shell mkdir -p $(BUILD_DIR)/baserom \
$(BUILD_DIR)/assets/text)
$(BUILD_DIR)/assets/text \
$(BUILD_DIR)/linker_scripts)
$(shell mkdir -p $(foreach dir, \
$(SRC_DIRS) \
$(UNDECOMPILED_DATA_DIRS) \
@ -502,9 +533,20 @@ $(shell mkdir -p $(foreach dir, \
$(dir:$(EXTRACTED_DIR)/%=$(BUILD_DIR)/%)))
endif
$(BUILD_DIR)/src/boot/build.o: CPP_DEFINES += -DBUILD_CREATOR="\"$(BUILD_CREATOR)\"" -DBUILD_DATE="\"$(BUILD_DATE)\"" -DBUILD_TIME="\"$(BUILD_TIME)\""
ifeq ($(COMPILER),ido)
$(BUILD_DIR)/src/boot/driverominit.o: OPTFLAGS := -O2
ifeq ($(PLATFORM),IQUE)
# iQue's driverominit.o seems to have been patched manually. For non-matching builds we edit the source code instead.
ifneq ($(NON_MATCHING),1)
$(BUILD_DIR)/src/boot/driverominit.o: POSTPROCESS_OBJ := $(PYTHON) tools/patch_ique_driverominit.py
endif
$(BUILD_DIR)/src/boot/viconfig.o: OPTFLAGS := -O2
endif
$(BUILD_DIR)/src/code/jpegutils.o: OPTFLAGS := -O2
$(BUILD_DIR)/src/code/jpegdecoder.o: OPTFLAGS := -O2
@ -523,10 +565,47 @@ endif
$(BUILD_DIR)/src/code/jpegutils.o: CC := $(CC_OLD)
$(BUILD_DIR)/src/code/jpegdecoder.o: CC := $(CC_OLD)
ifeq ($(DEBUG_FEATURES),1)
ifeq ($(PLATFORM),IQUE)
# Some files are compiled with EGCS on iQue
EGCS_O_FILES += $(BUILD_DIR)/src/boot/boot_main.o
EGCS_O_FILES += $(BUILD_DIR)/src/boot/idle.o
EGCS_O_FILES += $(BUILD_DIR)/src/boot/is_debug_ique.o
EGCS_O_FILES += $(BUILD_DIR)/src/boot/z_locale.o
EGCS_O_FILES += $(BUILD_DIR)/src/boot/z_std_dma.o
# EGCS_O_FILES += $(BUILD_DIR)/src/code/z_actor.o
EGCS_O_FILES += $(BUILD_DIR)/src/code/z_common_data.o
EGCS_O_FILES += $(BUILD_DIR)/src/code/z_construct.o
# EGCS_O_FILES += $(BUILD_DIR)/src/code/z_kanfont.o
# EGCS_O_FILES += $(BUILD_DIR)/src/code/z_message.o
EGCS_O_FILES += $(BUILD_DIR)/src/code/z_parameter.o
# EGCS_O_FILES += $(BUILD_DIR)/src/code/z_sram.o
EGCS_O_FILES += $(BUILD_DIR)/src/overlays/actors/ovl_En_Mag/z_en_mag.o
EGCS_O_FILES += $(BUILD_DIR)/src/overlays/actors/ovl_End_Title/z_end_title.o
EGCS_O_FILES += $(BUILD_DIR)/src/overlays/actors/ovl_Fishing/z_fishing.o
# EGCS_O_FILES += $(BUILD_DIR)/src/overlays/gamestates/ovl_file_choose/z_file_copy_erase.o
EGCS_O_FILES += $(BUILD_DIR)/src/overlays/gamestates/ovl_opening/z_opening.o
EGCS_O_FILES += $(BUILD_DIR)/src/overlays/gamestates/ovl_title/z_title.o
EGCS_O_FILES += $(BUILD_DIR)/src/overlays/misc/ovl_kaleido_scope/z_kaleido_map.o
EGCS_O_FILES += $(BUILD_DIR)/src/overlays/misc/ovl_kaleido_scope/z_kaleido_scope.o
$(EGCS_O_FILES): CC := $(EGCS_CC)
$(EGCS_O_FILES): CFLAGS := $(EGCS_CFLAGS) -mno-abicalls -funsigned-char
$(EGCS_O_FILES): MIPS_VERSION :=
endif
ifeq ($(PLATFORM),IQUE)
$(BUILD_DIR)/src/libc/%.o: CC := $(EGCS_CC)
$(BUILD_DIR)/src/libc/%.o: CCAS := $(EGCS_CCAS)
$(BUILD_DIR)/src/libc/%.o: CFLAGS := $(EGCS_CFLAGS) -mno-abicalls
$(BUILD_DIR)/src/libc/%.o: CCASFLAGS := $(EGCS_CCASFLAGS)
$(BUILD_DIR)/src/libc/%.o: OPTFLAGS := -O1
$(BUILD_DIR)/src/libc/%.o: MIPS_VERSION :=
else ifeq ($(DEBUG_FEATURES),1)
$(BUILD_DIR)/src/libc/%.o: OPTFLAGS := -g
$(BUILD_DIR)/src/libc/%.o: ASOPTFLAGS := -g
else
$(BUILD_DIR)/src/libc/%.o: OPTFLAGS := -O2
$(BUILD_DIR)/src/libc/%.o: ASOPTFLAGS := -O2
endif
$(BUILD_DIR)/src/libc64/%.o: OPTFLAGS := -O2
@ -546,12 +625,43 @@ endif
$(BUILD_DIR)/src/audio/sfx.o: CFLAGS += -use_readwrite_const
$(BUILD_DIR)/src/audio/sequence.o: CFLAGS += -use_readwrite_const
ifeq ($(PLATFORM),IQUE)
$(BUILD_DIR)/src/libultra/%.o: CC := $(EGCS_CC)
$(BUILD_DIR)/src/libultra/%.o: CCAS := $(EGCS_CCAS)
$(BUILD_DIR)/src/libultra/%.o: CFLAGS := $(EGCS_CFLAGS) -mno-abicalls
$(BUILD_DIR)/src/libultra/%.o: CCASFLAGS := $(EGCS_CCASFLAGS)
$(BUILD_DIR)/src/libultra/%.o: ASOPTFLAGS := $(EGCS_ASOPTFLAGS)
$(BUILD_DIR)/src/libultra/reg/_%.o: OPTFLAGS := -O0
$(BUILD_DIR)/src/libultra/reg/_%.o: MIPS_VERSION := -mgp64 -mfp64 -mips3
$(BUILD_DIR)/src/libultra/libc/ll.o: OPTFLAGS := -O0
$(BUILD_DIR)/src/libultra/libc/llcvt.o: OPTFLAGS := -O0
$(BUILD_DIR)/src/libultra/os/exceptasm.o: MIPS_VERSION := -mips3
$(BUILD_DIR)/src/libultra/os/invaldcache.o: MIPS_VERSION := -mips3
$(BUILD_DIR)/src/libultra/os/invalicache.o: MIPS_VERSION := -mips3
$(BUILD_DIR)/src/libultra/os/writebackdcache.o: MIPS_VERSION := -mips3
$(BUILD_DIR)/src/libultra/os/writebackdcacheall.o: MIPS_VERSION := -mips3
else
$(BUILD_DIR)/src/libultra/%.o: CC := $(CC_OLD)
$(BUILD_DIR)/src/libultra/libc/ll.o: OPTFLAGS := -O1
$(BUILD_DIR)/src/libultra/libc/ll.o: MIPS_VERSION := -mips3 -32
$(BUILD_DIR)/src/libultra/libc/ll.o: POSTPROCESS_OBJ := $(PYTHON) tools/set_o32abi_bit.py
$(BUILD_DIR)/src/libultra/libc/llcvt.o: OPTFLAGS := -O1
$(BUILD_DIR)/src/libultra/libc/llcvt.o: MIPS_VERSION := -mips3 -32
$(BUILD_DIR)/src/libultra/libc/llcvt.o: POSTPROCESS_OBJ := $(PYTHON) tools/set_o32abi_bit.py
$(BUILD_DIR)/src/libultra/os/exceptasm.o: MIPS_VERSION := -mips3 -32
$(BUILD_DIR)/src/libultra/os/exceptasm.o: POSTPROCESS_OBJ := $(PYTHON) tools/set_o32abi_bit.py
endif
$(BUILD_DIR)/src/code/%.o: ASOPTFLAGS := -O2
$(BUILD_DIR)/src/libleo/%.o: ASOPTFLAGS := -O2
$(BUILD_DIR)/src/libultra/libc/%.o: ASOPTFLAGS := -O2
$(BUILD_DIR)/src/libultra/mgu/%.o: ASOPTFLAGS := -O2
ifeq ($(LIBULTRA_VERSION),I)
$(BUILD_DIR)/src/libultra/gu/%.o: OPTFLAGS := -O3
@ -592,20 +702,32 @@ else
$(BUILD_DIR)/src/libultra/gu/%.o: OPTFLAGS := -O2
$(BUILD_DIR)/src/libultra/io/%.o: OPTFLAGS := -O2
$(BUILD_DIR)/src/libultra/libc/%.o: OPTFLAGS := -O2
ifeq ($(PLATFORM),IQUE)
$(BUILD_DIR)/src/libultra/os/%.o: OPTFLAGS := -O0
else
$(BUILD_DIR)/src/libultra/os/%.o: OPTFLAGS := -O1
endif
endif
$(BUILD_DIR)/src/libleo/%.o: CC := $(CC_OLD)
$(BUILD_DIR)/src/libleo/%.o: OPTFLAGS := -O2
ifeq ($(PLATFORM),IQUE)
$(BUILD_DIR)/src/libgcc/%.o: CC := $(EGCS_CC)
$(BUILD_DIR)/src/libgcc/%.o: CFLAGS := $(EGCS_CFLAGS)
endif
$(BUILD_DIR)/assets/misc/z_select_static/%.o: GBI_DEFINES := -DF3DEX_GBI
# For using asm_processor on some files:
#$(BUILD_DIR)/.../%.o: CC := $(PYTHON) tools/asm_processor/build.py $(CC) -- $(AS) $(ASFLAGS) --
ifeq ($(PLATFORM),IQUE)
$(BUILD_DIR)/src/makerom/%.o: CCAS := $(EGCS_CCAS)
$(BUILD_DIR)/src/makerom/%.o: CCASFLAGS := $(EGCS_CCASFLAGS)
$(BUILD_DIR)/src/makerom/%.o: ASOPTFLAGS := $(EGCS_ASOPTFLAGS)
endif
ifeq ($(PERMUTER),) # permuter + preprocess.py misbehaves, permuter doesn't care about rodata diffs or bss ordering so just don't use it in that case
# Handle encoding (UTF-8 -> EUC-JP) and custom pragmas
$(BUILD_DIR)/src/%.o: CC := ./tools/preprocess.sh -v $(VERSION) -i $(ICONV) -- $(CC)
$(BUILD_DIR)/src/%.o: PREPROCESS := ./tools/preprocess.sh -v $(VERSION) -i $(ICONV) --
endif
else
@ -686,14 +808,25 @@ endif
$(ROM): $(ELF)
$(ELF2ROM) -cic 6105 $< $@
$(ROMC): $(ROM) $(ELF) $(BUILD_DIR)/compress_ranges.txt
$(PYTHON) tools/compress.py --in $(ROM) --out $@ --dmadata-start `./tools/dmadata_start.sh $(NM) $(ELF)` --compress `cat $(BUILD_DIR)/compress_ranges.txt` --threads $(N_THREADS)
$(PYTHON) -m ipl3checksum sum --cic 6105 --update $@
ifeq ($(PLATFORM),IQUE)
COMPRESS_ARGS := --format gzip --pad-to 0x4000
CIC = 6102
else
COMPRESS_ARGS := --format yaz0 --pad-to 0x800000 --fill-padding-bytes
CIC = 6105
endif
$(ELF): $(TEXTURE_FILES_OUT) $(ASSET_FILES_OUT) $(O_FILES) $(OVL_RELOC_FILES) $(LDSCRIPT) $(BUILD_DIR)/undefined_syms.txt \
$(ROMC): $(ROM) $(ELF) $(BUILD_DIR)/compress_ranges.txt
$(PYTHON) tools/compress.py --in $(ROM) --out $@ --dmadata-start `./tools/dmadata_start.sh $(NM) $(ELF)` --compress `cat $(BUILD_DIR)/compress_ranges.txt` --threads $(N_THREADS) $(COMPRESS_ARGS)
$(PYTHON) -m ipl3checksum sum --cic $(CIC) --update $@
$(ELF): $(TEXTURE_FILES_OUT) $(ASSET_FILES_OUT) $(O_FILES) $(OVL_RELOC_FILES) $(LDSCRIPT) $(BUILD_DIR)/linker_scripts/makerom.ld $(BUILD_DIR)/undefined_syms.txt \
$(SAMPLEBANK_O_FILES) $(SOUNDFONT_O_FILES) $(SEQUENCE_O_FILES) \
$(BUILD_DIR)/assets/audio/sequence_font_table.o $(BUILD_DIR)/assets/audio/audiobank_padding.o
$(LD) -T $(LDSCRIPT) -T $(BUILD_DIR)/undefined_syms.txt --no-check-sections --accept-unknown-input-arch --emit-relocs -Map $(MAP) -o $@
$(LD) -T $(LDSCRIPT) -T $(BUILD_DIR)/linker_scripts/makerom.ld -T $(BUILD_DIR)/undefined_syms.txt --no-check-sections --accept-unknown-input-arch --emit-relocs -Map $(MAP) -o $@
$(BUILD_DIR)/linker_scripts/makerom.ld: linker_scripts/makerom.ld
$(CPP) -I include $(CPPFLAGS) $< > $@
## Order-only prerequisites
# These ensure e.g. the O_FILES are built before the OVL_RELOC_FILES.
@ -722,11 +855,17 @@ $(BUILD_DIR)/baserom/%.o: $(EXTRACTED_DIR)/baserom/%
$(BUILD_DIR)/data/%.o: data/%.s
$(CPP) $(CPPFLAGS) -Iinclude $< | $(AS) $(ASFLAGS) -o $@
$(BUILD_DIR)/assets/text/%.enc.jpn.h: assets/text/%.h $(EXTRACTED_DIR)/text/%.h assets/text/charmap.txt
$(CPP) $(CPPFLAGS) -I$(EXTRACTED_DIR) $< | $(PYTHON) tools/msgenc.py --encoding jpn --charmap assets/text/charmap.txt - $@
ifeq ($(PLATFORM),IQUE)
NES_CHARMAP := assets/text/charmap.chn.txt
else
NES_CHARMAP := assets/text/charmap.nes.txt
endif
$(BUILD_DIR)/assets/text/%.enc.nes.h: assets/text/%.h $(EXTRACTED_DIR)/text/%.h assets/text/charmap.txt
$(CPP) $(CPPFLAGS) -I$(EXTRACTED_DIR) $< | $(PYTHON) tools/msgenc.py --encoding nes --charmap assets/text/charmap.txt - $@
$(BUILD_DIR)/assets/text/%.enc.nes.h: assets/text/%.h $(EXTRACTED_DIR)/text/%.h $(NES_CHARMAP)
$(CPP) $(CPPFLAGS) -I$(EXTRACTED_DIR) $< | $(PYTHON) tools/msgenc.py --encoding utf-8 --charmap $(NES_CHARMAP) - $@
$(BUILD_DIR)/assets/text/%.enc.jpn.h: assets/text/%.h $(EXTRACTED_DIR)/text/%.h assets/text/charmap.jpn.txt
$(CPP) $(CPPFLAGS) -I$(EXTRACTED_DIR) $< | $(PYTHON) tools/msgenc.py --encoding SHIFT-JIS --wchar --charmap assets/text/charmap.jpn.txt - $@
# Dependencies for files including message data headers
# TODO remove when full header dependencies are used.
@ -749,14 +888,37 @@ endif
$(BUILD_DIR)/assets/%.o: assets/%.c
$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $<
$(OBJCOPY) -O binary $@ $@.bin
$(OBJCOPY_CMD)
$(BUILD_DIR)/assets/%.o: $(EXTRACTED_DIR)/assets/%.c
$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $<
$(OBJCOPY) -O binary $@ $@.bin
$(OBJCOPY_CMD)
# Assemble the ROM header with GNU AS always
$(BUILD_DIR)/src/makerom/rom_header.o: src/makerom/rom_header.s
ifeq ($(COMPILER),ido)
$(CPP) $(CPPFLAGS) $(MIPS_BUILTIN_DEFS) $(INC) $< | $(AS) $(ASFLAGS) -o $@
else
$(CCAS) -c $(CCASFLAGS) $(MIPS_VERSION) $(ASOPTFLAGS) -o $@ $<
endif
$(OBJDUMP_CMD)
$(BUILD_DIR)/src/makerom/ipl3.o: $(EXTRACTED_DIR)/incbin/ipl3
$(OBJCOPY) -I binary -O elf32-big --rename-section .data=.text $< $@
$(BUILD_DIR)/src/%.o: src/%.s
$(CPP) $(CPPFLAGS) -Iinclude $< | $(AS) $(ASFLAGS) -o $@
ifeq ($(COMPILER),ido)
$(CCAS) -c $(CCASFLAGS) $(MIPS_VERSION) $(ASOPTFLAGS) -o $(@:.o=.tmp.o) $<
# IDO generates bad symbol tables, fix the symbol table with strip..
$(STRIP) $(@:.o=.tmp.o) -N dummy-symbol-name
# but strip doesn't know about file-relative offsets in .mdebug and doesn't relocate them, ld will
# segfault unless .mdebug is removed
$(OBJCOPY) --remove-section .mdebug $(@:.o=.tmp.o) $@
else
$(CCAS) -c $(CCASFLAGS) $(MIPS_VERSION) $(ASOPTFLAGS) -o $@ $<
endif
$(POSTPROCESS_OBJ) $@
$(OBJDUMP_CMD)
# Incremental link to move z_message and z_game_over data into rodata
$(BUILD_DIR)/src/code/z_message_z_game_over.o: $(BUILD_DIR)/src/code/z_message.o $(BUILD_DIR)/src/code/z_game_over.o
@ -785,23 +947,16 @@ $(BUILD_DIR)/src/%.o: src/%.c
ifneq ($(RUN_CC_CHECK),0)
$(CC_CHECK) $<
endif
$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $<
@$(OBJDUMP) $(OBJDUMP_FLAGS) $@ > $(@:.o=.s)
$(PREPROCESS) $(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $<
$(POSTPROCESS_OBJ) $@
$(OBJDUMP_CMD)
$(BUILD_DIR)/src/libultra/libc/ll.o: src/libultra/libc/ll.c
$(BUILD_DIR)/src/audio/session_init.o: src/audio/session_init.c $(BUILD_DIR)/assets/audio/soundfont_sizes.h $(BUILD_DIR)/assets/audio/sequence_sizes.h
ifneq ($(RUN_CC_CHECK),0)
$(CC_CHECK) $<
endif
$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $<
$(PYTHON) tools/set_o32abi_bit.py $@
@$(OBJDUMP) $(OBJDUMP_FLAGS) $@ > $(@:.o=.s)
$(BUILD_DIR)/src/libultra/libc/llcvt.o: src/libultra/libc/llcvt.c
ifneq ($(RUN_CC_CHECK),0)
$(CC_CHECK) $<
endif
$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $@ $<
$(PYTHON) tools/set_o32abi_bit.py $@
$(CC) -c $(CFLAGS) $(MIPS_VERSION) $(OPTFLAGS) -o $(@:.o=.tmp) $<
$(LD) -r -T linker_scripts/data_with_rodata.ld -o $@ $(@:.o=.tmp)
@$(OBJDUMP) $(OBJDUMP_FLAGS) $@ > $(@:.o=.s)
$(BUILD_DIR)/src/overlays/%_reloc.o: $(BUILD_DIR)/$(SPEC)
@ -967,8 +1122,6 @@ $(BUILD_DIR)/assets/audio/sequence_font_table.o: $(BUILD_DIR)/assets/audio/seque
# make headers with file sizes and amounts
$(BUILD_DIR)/src/audio/session_config.o: $(BUILD_DIR)/assets/audio/soundfont_sizes.h $(BUILD_DIR)/assets/audio/sequence_sizes.h
$(BUILD_DIR)/assets/audio/soundfont_sizes.h: $(SOUNDFONT_O_FILES)
$(AFILE_SIZES) $@ NUM_SOUNDFONTS SOUNDFONT_SIZES .rodata $^

3
README.md
View file

@ -81,6 +81,7 @@ The build process has the following package requirements:
* git
* build-essential
* binutils-mips-linux-gnu
* curl
* python3
* python3-pip
* python3-venv
@ -91,7 +92,7 @@ Under Debian / Ubuntu (which we recommend using), you can install them with the
```bash
sudo apt-get update
sudo apt-get install git build-essential binutils-mips-linux-gnu python3 python3-pip python3-venv libpng-dev libxml2-dev
sudo apt-get install git build-essential binutils-mips-linux-gnu curl python3 python3-pip python3-venv libpng-dev libxml2-dev
```
If you are using GCC as the compiler for Ocarina of Time, you will also need:

2
assets/audio/sequences/seq_109.prg.seq
View file

@ -1149,7 +1149,7 @@ ENVELOPE_08BA:
point 20, 20000
hang
#if OOT_VERSION == NTSC_1_2 || PLATFORM_GC
#if OOT_VERSION == NTSC_1_2 || !PLATFORM_N64
.filter FILTER_0932
filter 0, 0, 0, 0, 0, 0, 0, 0

1823
assets/text/charmap.chn.txt Normal file
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20
assets/text/charmap.jpn.txt Normal file
View file

@ -0,0 +1,20 @@
# Determines how certain text sequences should be encoded for the JPN text encoding.
{
'\n' : 0x000A,
'[A]' : 0x839F,
'[B]' : 0x83A0,
'[C]' : 0x83A1,
'[L]' : 0x83A2,
'[R]' : 0x83A3,
'[Z]' : 0x83A4,
'[C-Up]' : 0x83A5,
'[C-Down]' : 0x83A6,
'[C-Left]' : 0x83A7,
'[C-Right]' : 0x83A8,
'▼' : 0x83A9,
'[Control-Pad]' : 0x83AA,
# Possibly from a SHIFT-JIS extension, python doesn't have builtin support
'┯' : 0x86D3,
}

50
assets/text/charmap.nes.txt Normal file
View file

@ -0,0 +1,50 @@
# Determines how certain text sequences should be encoded for the NES text encoding.
{
'\n' : 0x01,
'[A]' : 0x9F,
'[B]' : 0xA0,
'[C]' : 0xA1,
'[L]' : 0xA2,
'[R]' : 0xA3,
'[Z]' : 0xA4,
'[C-Up]' : 0xA5,
'[C-Down]' : 0xA6,
'[C-Left]' : 0xA7,
'[C-Right]' : 0xA8,
'▼' : 0xA9,
'[Control-Pad]' : 0xAA,
'[D-Pad]' : 0xAB,
'À' : 0x80,
'î' : 0x81,
'Â' : 0x82,
'Ä' : 0x83,
'Ç' : 0x84,
'È' : 0x85,
'É' : 0x86,
'Ê' : 0x87,
'Ë' : 0x88,
'Ï' : 0x89,
'Ô' : 0x8A,
'Ö' : 0x8B,
'Ù' : 0x8C,
'Û' : 0x8D,
'Ü' : 0x8E,
'ß' : 0x8F,
'à' : 0x90,
'á' : 0x91,
'â' : 0x92,
'ä' : 0x93,
'ç' : 0x94,
'è' : 0x95,
'é' : 0x96,
'ê' : 0x97,
'ë' : 0x98,
'ï' : 0x99,
'ô' : 0x9A,
'ö' : 0x9B,
'ù' : 0x9C,
'û' : 0x9D,
'ü' : 0x9E,
}

57
assets/text/charmap.txt
View file

@ -1,57 +0,0 @@
# Determines how certain text sequences should be encoded. The text sequence is
# converted to either the first or second tuple element based on whether the
# target encoding is the "wide" encoding. The first element is for the non-wide
# encoding, used for all languages besides JP, while the second element is for
# the wide encoding, used for JP.
{
'\n' : (0x01, 0x000A),
'[A]' : (0x9F, 0x839F),
'[B]' : (0xA0, 0x83A0),
'[C]' : (0xA1, 0x83A1),
'[L]' : (0xA2, 0x83A2),
'[R]' : (0xA3, 0x83A3),
'[Z]' : (0xA4, 0x83A4),
'[C-Up]' : (0xA5, 0x83A5),
'[C-Down]' : (0xA6, 0x83A6),
'[C-Left]' : (0xA7, 0x83A7),
'[C-Right]' : (0xA8, 0x83A8),
'▼' : (0xA9, 0x83A9),
'[Control-Pad]' : (0xAA, 0x83AA),
'[D-Pad]' : (0xAB, None),
# Possibly from a SHIFT-JIS extension, python doesn't have builtin support
'┯' : (None, 0x86D3),
'À' : (0x80, None),
'î' : (0x81, None),
'Â' : (0x82, None),
'Ä' : (0x83, None),
'Ç' : (0x84, None),
'È' : (0x85, None),
'É' : (0x86, None),
'Ê' : (0x87, None),
'Ë' : (0x88, None),
'Ï' : (0x89, None),
'Ô' : (0x8A, None),
'Ö' : (0x8B, None),
'Ù' : (0x8C, None),
'Û' : (0x8D, None),
'Ü' : (0x8E, None),
'ß' : (0x8F, None),
'à' : (0x90, None),
'á' : (0x91, None),
'â' : (0x92, None),
'ä' : (0x93, None),
'ç' : (0x94, None),
'è' : (0x95, None),
'é' : (0x96, None),
'ê' : (0x97, None),
'ë' : (0x98, None),
'ï' : (0x99, None),
'ô' : (0x9A, None),
'ö' : (0x9B, None),
'ù' : (0x9C, None),
'û' : (0x9D, None),
'ü' : (0x9E, None),
}

21
assets/xml/objects/object_mag_ique.xml Normal file
View file

@ -0,0 +1,21 @@
<Root>
<File Name="object_mag" Segment="6">
<Texture Name="gTitleZeldaShieldLogoTex" OutName="title_zelda_shield_logo" Format="rgba32" Width="160" Height="160" Offset="0x0"/>
<Texture Name="gTitleCopyright19982003Tex" OutName="title_copyright_19982003" Format="ia8" Width="128" Height="16" Offset="0x19000"/>
<Texture Name="gTitleCopyright2003iQueTex" OutName="title_copyright_2003_ique" Format="ia8" Width="128" Height="16" Offset="0x19800"/>
<Texture Name="gTitleDiskTex" OutName="title_disk" Format="ia8" Width="48" Height="16" Offset="0x1A000"/>
<Texture Name="gTitleEffectMask00Tex" OutName="title_effect_mask_0_0" Format="i4" Width="64" Height="64" Offset="0x1A300"/>
<Texture Name="gTitleEffectMask01Tex" OutName="title_effect_mask_0_1" Format="i4" Width="64" Height="64" Offset="0x1AB00"/>
<Texture Name="gTitleEffectMask02Tex" OutName="title_effect_mask_0_2" Format="i4" Width="64" Height="64" Offset="0x1B300"/>
<Texture Name="gTitleEffectMask10Tex" OutName="title_effect_mask_1_0" Format="i4" Width="64" Height="64" Offset="0x1BB00"/>
<Texture Name="gTitleEffectMask11Tex" OutName="title_effect_mask_1_1" Format="i4" Width="64" Height="64" Offset="0x1C300"/>
<Texture Name="gTitleEffectMask12Tex" OutName="title_effect_mask_1_2" Format="i4" Width="64" Height="64" Offset="0x1CB00"/>
<Texture Name="gTitleEffectMask20Tex" OutName="title_effect_mask_2_0" Format="i4" Width="64" Height="64" Offset="0x1D300"/>
<Texture Name="gTitleEffectMask21Tex" OutName="title_effect_mask_2_1" Format="i4" Width="64" Height="64" Offset="0x1DB00"/>
<Texture Name="gTitleEffectMask22Tex" OutName="title_effect_mask_2_2" Format="i4" Width="64" Height="64" Offset="0x1E300"/>
<Texture Name="gTitleFlameEffectTex" OutName="title_flame_effect" Format="i8" Width="32" Height="32" Offset="0x1EB00"/>
<Texture Name="gTitleTheLegendOfTextTex" OutName="title_the_legend_of_text" Format="i8" Width="72" Height="8" Offset="0x1EF00"/>
<Texture Name="gTitleOcarinaOfTimeTMTextTex" OutName="title_ocarina_of_time_tm_text" Format="i8" Width="96" Height="8" Offset="0x1F140"/>
<Texture Name="gTitleTitleCNTex" OutName="title_title_cn" Format="i8" Width="128" Height="16" Offset="0x1F440"/>
</File>
</Root>

26
assets/xml/overlays/ovl_End_Title_ique.xml Normal file
View file

@ -0,0 +1,26 @@
<Root>
<File Name="ovl_End_Title">
<DList Name="sEmptyDL1" Offset="0x0"/>
<Texture Name="sIQueTop" OutName="ique_top" Format="ia8" Width="128" Height="24" Offset="0x8"/>
<Texture Name="sIQueBottom" OutName="ique_bottom" Format="ia8" Width="128" Height="24" Offset="0xC08"/>
<DList Name="sEmptyDL2" Offset="0x1808"/>
<Texture Name="sNintendoLeftTex" OutName="nintendo_left" Format="ia8" Width="64" Height="48" Offset="0x1810"/>
<DList Name="sEmptyDL3" Offset="0x2410"/>
<Texture Name="sNintendoRightTex" OutName="nintendo_right" Format="ia8" Width="64" Height="48" Offset="0x2418"/>
<DList Name="sEmptyDL4" Offset="0x3018"/>
<Texture Name="sPresentedByTex" OutName="presented_by" Format="ia8" Width="96" Height="16" Offset="0x3020"/>
<DList Name="sEmptyDL5" Offset="0x3620"/>
<Texture Name="sTheEndTex" OutName="the_end" Format="ia8" Width="80" Height="24" Offset="0x3628"/>
<DList Name="sEmptyDL6" Offset="0x3DA8"/>
<Texture Name="sTheLegendOfZeldaTex" OutName="the_legend_of_zelda" Format="ia8" Width="120" Height="24" Offset="0x3DB0"/>
<DList Name="sEmptyDL7" Offset="0x48F0"/>
<Texture Name="sOcarinaOfTimeTex" OutName="ocarina_of_time" Format="ia8" Width="112" Height="16" Offset="0x48F8"/>
<Array Name="sTriforceVtx" Count="6" Offset="0x4FF8">
<Vtx/>
</Array>
<DList Name="sTriforceDL" Offset="0x5058"/>
<DList Name="sPresentedByNintendoDL" Offset="0x50B8"/>
</File>
</Root>

1919
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2
baseroms/gc-eu-mq-dbg/config.yml
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@ -1,5 +1,5 @@
dmadata_start: 0x12F70
text_lang_pal: true
text_lang: PAL
incbins:
- name: ipl3
segment: makerom

2
baseroms/gc-eu-mq/config.yml
View file

@ -1,5 +1,5 @@
dmadata_start: 0x7170
text_lang_pal: true
text_lang: PAL
incbins:
- name: ipl3
segment: makerom

2
baseroms/gc-eu/config.yml
View file

@ -1,5 +1,5 @@
dmadata_start: 0x7170
text_lang_pal: true
text_lang: PAL
incbins:
- name: ipl3
segment: makerom

2
baseroms/gc-jp-ce/config.yml
View file

@ -1,5 +1,5 @@
dmadata_start: 0x7170
text_lang_pal: false
text_lang: NTSC
incbins:
- name: ipl3
segment: makerom

2
baseroms/gc-jp-mq/config.yml
View file

@ -1,5 +1,5 @@
dmadata_start: 0x7170
text_lang_pal: false
text_lang: NTSC
incbins:
- name: ipl3
segment: makerom

2
baseroms/gc-jp/config.yml
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@ -1,5 +1,5 @@
dmadata_start: 0x7170
text_lang_pal: false
text_lang: NTSC
incbins:
- name: ipl3
segment: makerom

2
baseroms/gc-us-mq/config.yml
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@ -1,5 +1,5 @@
dmadata_start: 0x7170
text_lang_pal: false
text_lang: NTSC
incbins:
- name: ipl3
segment: makerom

2
baseroms/gc-us/config.yml
View file

@ -1,5 +1,5 @@
dmadata_start: 0x7170
text_lang_pal: false
text_lang: NTSC
incbins:
- name: ipl3
segment: makerom

1
baseroms/ique-cn/checksum-compressed.md5 Normal file
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@ -0,0 +1 @@
0ab48b2d44a74b3bb2d384f6170c2742 build/ique-cn/oot-ique-cn-compressed.z64

1
baseroms/ique-cn/checksum.md5 Normal file
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@ -0,0 +1 @@
17a9f30d722c29e6912bd4b66713d2b0 build/ique-cn/oot-ique-cn.z64

1212
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1510
baseroms/ique-cn/segments.csv Normal file
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2
baseroms/ntsc-1.0/config.yml
View file

@ -2,7 +2,7 @@ checksums:
- checksum-JP
- checksum-US
dmadata_start: 0x7430
text_lang_pal: false
text_lang: NTSC
incbins:
- name: ipl3
segment: makerom

2
baseroms/ntsc-1.1/config.yml
View file

@ -2,7 +2,7 @@ checksums:
- checksum-JP
- checksum-US
dmadata_start: 0x7430
text_lang_pal: false
text_lang: NTSC
incbins:
- name: ipl3
segment: makerom

2
baseroms/ntsc-1.2/config.yml
View file

@ -2,7 +2,7 @@ checksums:
- checksum-JP
- checksum-US
dmadata_start: 0x7960
text_lang_pal: false
text_lang: NTSC
incbins:
- name: ipl3
segment: makerom

2
baseroms/pal-1.0/config.yml
View file

@ -1,5 +1,5 @@
dmadata_start: 0x7950
text_lang_pal: true
text_lang: PAL
incbins:
- name: ipl3
segment: makerom

2
baseroms/pal-1.1/config.yml
View file

@ -1,5 +1,5 @@
dmadata_start: 0x7950
text_lang_pal: true
text_lang: PAL
incbins:
- name: ipl3
segment: makerom

7
docs/BUILDING_MACOS.md
View file

@ -43,10 +43,9 @@ cd ~/binutils-tmp
Get and extract binutils source
```bash
wget https://ftp.gnu.org/gnu/binutils/binutils-2.35.tar.bz2
curl -O https://ftp.gnu.org/gnu/binutils/binutils-2.35.tar.bz2
tar xjf binutils-2.35.tar.bz2
```
(You may find this command does not work: if so, just access the URL in a browser and save it to `~/binutils-tmp`.)
Create and enter a build directory
```bash
@ -65,9 +64,9 @@ make -j
sudo make install
```
Edit your `~/.bash_profile`/`~/.zsh_profile` (or whichever shell you use) to add the new binutils binaries to the system PATH
Edit your `~/.bash_profile`/`~/.zprofile` (or whichever shell you use) to add the new binutils binaries to the system PATH
```bash
echo "export PATH=$PATH:/opt/cross/bin" >> ~/.bash_profile
echo 'export PATH="$PATH:/opt/cross/bin"' >> ~/.bash_profile
```
Reload `~/.bash_profile` (or just launch a new terminal tab)

16
include/attributes.h
View file

@ -8,12 +8,22 @@
#endif
#define UNUSED __attribute__((unused))
#define FALLTHROUGH __attribute__((fallthrough))
#define NORETURN __attribute__((noreturn))
#define NO_REORDER __attribute__((no_reorder))
#define SECTION_DATA __attribute__((section(".data")))
#ifdef __GNUC__
#if __GNUC__ >= 7
#define FALLTHROUGH __attribute__((fallthrough))
#else
#define FALLTHROUGH
#endif
#if defined(__GNUC__) && defined(NON_MATCHING)
#define NORETURN __attribute__((noreturn))
#else
#define NORETURN
#endif
#if defined(__GNUC__) && defined(NON_MATCHING)
#define UNREACHABLE() __builtin_unreachable()
#else
#define UNREACHABLE()

8
include/fault.h
View file

@ -5,7 +5,7 @@
#include "attributes.h"
#include "padmgr.h"
#if PLATFORM_GC
#if !PLATFORM_N64
// These are the same as the 3-bit ansi color codes
#define FAULT_COLOR_BLACK 0
#define FAULT_COLOR_RED 1
@ -33,7 +33,7 @@ typedef struct FaultClient {
/* 0x0C */ void* arg1;
} FaultClient; // size = 0x10
#if PLATFORM_GC
#if !PLATFORM_N64
typedef struct FaultAddrConvClient {
/* 0x00 */ struct FaultAddrConvClient* next;
/* 0x04 */ void* callback;
@ -78,7 +78,7 @@ void func_800AE1F8(void);
#define Fault_SetFontColor(color) (void)0
#define Fault_SetCharPad(padW, padH) (void)0
#elif PLATFORM_GC
#else
void Fault_InitDrawer(void);
void Fault_SetForeColor(u16 color);
@ -98,7 +98,7 @@ extern volatile OSThread* gFaultFaultedThread;
#define FAULT_MSG_ID gFaultMsgId
#elif PLATFORM_GC
#else
typedef struct FaultMgr {
/* 0x000 */ OSThread thread;

7
include/functions.h
View file

@ -9,10 +9,11 @@ void Main_ThreadEntry(void* arg);
void Idle_ThreadEntry(void* arg);
void ViConfig_UpdateVi(u32 black);
void ViConfig_UpdateBlack(void);
void* Yaz0_FirstDMA(void);
void* Yaz0_NextDMA(u8* curSrcPos);
void Yaz0_DecompressImpl(u8* src, u8* dst);
#if !PLATFORM_IQUE
void Yaz0_Decompress(uintptr_t romStart, u8* dst, size_t size);
#else
void gzip_decompress(uintptr_t romStart, u8* dst, size_t size);
#endif
void Locale_Init(void);
void Locale_ResetRegion(void);
#if DEBUG_FEATURES

2
include/libc/assert.h
View file

@ -29,7 +29,7 @@ __attribute__((noreturn)) void __assert(const char* assertion, const char* file,
// Static/compile-time assertions
#if !defined(__sgi) && (defined(__GNUC__) || (__STDC_VERSION__ >= 201112L))
#if !defined(__sgi) && (__GNUC__ >= 5 || __STDC_VERSION__ >= 201112L)
# define static_assert(cond, msg) _Static_assert(cond, msg)
#else
# ifndef GLUE

4
include/libc/math.h
View file

@ -61,6 +61,10 @@ f64 sqrt(f64 f);
#endif
#if !PLATFORM_N64
extern float gPositiveInfinity;
extern float gNegativeInfinity;
extern float gPositiveZero;
extern float gNegativeZero;
extern float qNaN0x3FFFFF;
extern float qNaN0x10000;
extern float sNaN0x3FFFFF;

31
include/libc/stdarg.h
View file

@ -1,16 +1,16 @@
#ifndef STDARG_H
#define STDARG_H
// When building with GCC, use the official vaarg macros to avoid warnings and possibly bad codegen.
// When building with modern GCC, use the official vaarg macros to avoid warnings and possibly bad codegen.
#ifdef __GNUC__
#if __GNUC__ >= 3
#define va_list __builtin_va_list
#define va_start __builtin_va_start
#define va_arg __builtin_va_arg
#define va_end __builtin_va_end
#else
#elif defined(__sgi) /* IDO */
#ifndef _VA_LIST_
# define _VA_LIST_
@ -52,6 +52,29 @@ typedef char* va_list;
/* No cleanup processing is required for the end of a varargs list: */
#define va_end(__list)
#endif /* __GNUC__ */
#else /* EGCS */
typedef char * __gnuc_va_list;
#define __va_rounded_size(__TYPE) \
(((sizeof (__TYPE) + sizeof (int) - 1) / sizeof (int)) * sizeof (int))
#define va_start(__AP, __LASTARG) \
(__AP = (__gnuc_va_list) __builtin_next_arg (__LASTARG))
#define va_end(__AP) ((void)0)
/* We cast to void * and then to TYPE * because this avoids
a warning about increasing the alignment requirement. */
#define va_arg(__AP, __type) \
((__type *) (void *) (__AP = (char *) ((__alignof__(__type) > 4 \
? ((__PTRDIFF_TYPE__)__AP + 8 - 1) & -8 \
: ((__PTRDIFF_TYPE__)__AP + 4 - 1) & -4) \
+ __va_rounded_size (__type))), \
*(__type *) (void *) (__AP - __va_rounded_size (__type)))
typedef __gnuc_va_list va_list;
#endif
#endif

2
include/libc/stddef.h
View file

@ -15,7 +15,7 @@ typedef unsigned long size_t;
#endif
#ifdef __GNUC__
#if __GNUC__ >= 4
#define offsetof(structure, member) __builtin_offsetof (structure, member)
#else
#define offsetof(structure, member) ((size_t)&(((structure*)0)->member))

2
include/libc64/os_malloc.h
View file

@ -11,7 +11,7 @@ typedef struct Arena {
#if PLATFORM_N64
/* 0x08 */ u32 size;
/* 0x0C */ u8 allocFailures;
#elif PLATFORM_GC
#else
/* 0x08 */ OSMesgQueue lockQueue;
/* 0x20 */ u8 allocFailures; // only used in non-debug builds
/* 0x21 */ u8 isInit;

52
include/line_numbers.h
View file

@ -5,31 +5,35 @@
// The "LN" macros defined here are not meant to be used directly. See the wrapper macros below.
#if OOT_VERSION == NTSC_1_0
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (ntsc_1_0)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (ntsc_1_0)
#elif OOT_VERSION == NTSC_1_1
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (ntsc_1_1)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (ntsc_1_1)
#elif OOT_VERSION == PAL_1_0
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (pal_1_0)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (pal_1_0)
#elif OOT_VERSION == NTSC_1_2
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (ntsc_1_2)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (ntsc_1_2)
#elif OOT_VERSION == PAL_1_1
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (pal_1_1)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (pal_1_1)
#elif OOT_VERSION == GC_JP
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (gc_jp)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (gc_jp)
#elif OOT_VERSION == GC_JP_MQ
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (gc_jp_mq)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (gc_jp_mq)
#elif OOT_VERSION == GC_US
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (gc_us)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (gc_us)
#elif OOT_VERSION == GC_US_MQ
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (gc_us_mq)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (gc_us_mq)
#elif OOT_VERSION == GC_EU_MQ_DBG
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (gc_eu_mq_dbg)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (gc_eu_mq_dbg)
#elif OOT_VERSION == GC_EU
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (gc_eu)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (gc_eu)
#elif OOT_VERSION == GC_EU_MQ
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (gc_eu_mq)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (gc_eu_mq)
#elif OOT_VERSION == GC_JP_CE
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce) (gc_jp_ce)
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (gc_jp_ce)
#elif OOT_VERSION == IQUE_CN
#define LN(ntsc_1_0, ntsc_1_1, pal_1_0, ntsc_1_2, pal_1_1, gc_jp, gc_jp_mq, gc_us, gc_us_mq, gc_eu_mq_dbg, gc_eu, gc_eu_mq, gc_jp_ce, ique_cn) (ique_cn)
#else
#error "Unsupported OOT version"
#endif
/**
@ -42,22 +46,22 @@
// NTSC 1.0 and all the other versions
#define LN1(ntsc_1_0, other) \
LN(ntsc_1_0, other, other, other, other, other, other, other, other, other, other, other, other)
LN(ntsc_1_0, other, other, other, other, other, other, other, other, other, other, other, other, other)
// NTSC 1.0, NTSC 1.1, and all the other versions
#define LN2(ntsc_1_0, ntsc_1_1, other) \
LN(ntsc_1_0, ntsc_1_1, other, other, other, other, other, other, other, other, other, other, other)
LN(ntsc_1_0, ntsc_1_1, other, other, other, other, other, other, other, other, other, other, other, other)
// NTSC 1.0, Gamecube, and all the other versions
#define LN3(ntsc_1_0, other, gc) \
LN(ntsc_1_0, other, other, other, other, gc, gc, gc, gc, gc, gc, gc, gc)
// NTSC 1.0, iQue, GameCube, and all the other versions
#define LN3(ntsc_1_0, other, ique, gc) \
LN(ntsc_1_0, other, other, other, other, gc, gc, gc, gc, gc, gc, gc, gc, ique)
// NTSC 1.0, NTSC 1.1, Gamecube, and all the other versions
#define LN4(ntsc_1_0, ntsc_1_1, other, gc) \
LN(ntsc_1_0, ntsc_1_1, other, other, other, gc, gc, gc, gc, gc, gc, gc, gc)
// NTSC 1.0, NTSC 1.1, iQue, GameCube, and all the other versions
#define LN4(ntsc_1_0, ntsc_1_1, other, ique, gc) \
LN(ntsc_1_0, ntsc_1_1, other, other, other, gc, gc, gc, gc, gc, gc, gc, gc, ique)
// NTSC 1.0, NTSC 1.1, NTSC 1.2/PAL 1.0, Gamecube US/JP, Gamecube EU, and Gamecube CE
#define LN5(ntsc_1_0, ntsc_1_1, other, pal_1_1, gc_ntsc, gc_eu, gc_jp_ce) \
LN(ntsc_1_0, ntsc_1_1, other, other, pal_1_1, gc_ntsc, gc_ntsc, gc_ntsc, gc_ntsc, gc_eu, gc_eu, gc_eu, gc_jp_ce)
// NTSC 1.0, NTSC 1.1, NTSC 1.2/PAL 1.0, iQue, Gamecube US/JP, Gamecube EU, and Gamecube CE
#define LN5(ntsc_1_0, ntsc_1_1, other, pal_1_1, ique, gc_ntsc, gc_eu, gc_jp_ce) \
LN(ntsc_1_0, ntsc_1_1, other, other, pal_1_1, gc_ntsc, gc_ntsc, gc_ntsc, gc_ntsc, gc_eu, gc_eu, gc_eu, gc_jp_ce, ique)
#endif

29
include/macros.h
View file

@ -1,6 +1,7 @@
#ifndef MACROS_H
#define MACROS_H
#include "terminal.h"
#include "versions.h"
#ifndef AVOID_UB
@ -53,10 +54,38 @@
#define PRINTF osSyncPrintf
#elif IDO_PRINTF_WORKAROUND
#define PRINTF(args) (void)0
#elif defined(__GNUC__) && __GNUC__ < 3
#define PRINTF(format, args...) while (0) osSyncPrintf(format, ##args)
#else
#define PRINTF(format, ...) (void)0
#endif
#if DEBUG_FEATURES
#define PRINTF_COLOR_BLACK() PRINTF(VT_FGCOL(BLACK))
#define PRINTF_COLOR_RED() PRINTF(VT_FGCOL(RED))
#define PRINTF_COLOR_GREEN() PRINTF(VT_FGCOL(GREEN))
#define PRINTF_COLOR_YELLOW() PRINTF(VT_FGCOL(YELLOW))
#define PRINTF_COLOR_BLUE() PRINTF(VT_FGCOL(BLUE))
#define PRINTF_COLOR_MAGENTA() PRINTF(VT_FGCOL(MAGENTA))
#define PRINTF_COLOR_CYAN() PRINTF(VT_FGCOL(CYAN))
#define PRINTF_COLOR_WHITE() PRINTF(VT_FGCOL(WHITE))
#define PRINTF_COLOR_WARNING() PRINTF(VT_COL(YELLOW, BLACK))
#define PRINTF_COLOR_ERROR() PRINTF(VT_COL(RED, WHITE))
#define PRINTF_RST() PRINTF(VT_RST)
#else
#define PRINTF_COLOR_BLACK() (void)0
#define PRINTF_COLOR_RED() (void)0
#define PRINTF_COLOR_GREEN() (void)0
#define PRINTF_COLOR_YELLOW() (void)0
#define PRINTF_COLOR_BLUE() (void)0
#define PRINTF_COLOR_MAGENTA() (void)0
#define PRINTF_COLOR_CYAN() (void)0
#define PRINTF_COLOR_WHITE() (void)0
#define PRINTF_COLOR_WARNING() (void)0
#define PRINTF_COLOR_ERROR() (void)0
#define PRINTF_RST() (void)0
#endif
#if DEBUG_FEATURES
#define LOG(exp, value, format, file, line) \
do { \

513
include/ultra64/R4300.h
View file

@ -4,13 +4,11 @@
#ifdef _LANGUAGE_C
#include "ultratypes.h"
#define U32(x) ((u32)x)
#define C_REG(x) (x)
#else
#define U32(x) (x)
#define C_REG(x) $x
#endif
// Segment base addresses and sizes
/* Segment base addresses and sizes */
#define KUBASE 0
#define KUSIZE 0x80000000
#define K0BASE 0x80000000
@ -20,24 +18,24 @@
#define K2BASE 0xC0000000
#define K2SIZE 0x20000000
// Exception vectors
#define SIZE_EXCVEC 0x80 // Size of an exc. vec
#define UT_VEC K0BASE // utlbmiss vector
#define R_VEC (K1BASE + 0x1FC00000) // reset vector
#define XUT_VEC (K0BASE + 0x80) // extended address tlbmiss
#define ECC_VEC (K0BASE + 0x100) // Ecc exception vector
#define E_VEC (K0BASE + 0x180) // Gen. exception vector
/* Exception vectors */
#define SIZE_EXCVEC 0x80 /* Size of an exc. vec */
#define UT_VEC K0BASE /* utlbmiss vector */
#define R_VEC (K1BASE + 0x1FC00000) /* reset vector */
#define XUT_VEC (K0BASE + 0x80) /* extended address tlbmiss */
#define ECC_VEC (K0BASE + 0x100) /* Ecc exception vector */
#define E_VEC (K0BASE + 0x180) /* Gen. exception vector */
// Address conversion macros
#define K0_TO_K1(x) (U32(x) | 0xA0000000) // kseg0 to kseg1
#define K1_TO_K0(x) (U32(x) & 0x9FFFFFFF) // kseg1 to kseg0
#define K0_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) // kseg0 to physical
#define K1_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) // kseg1 to physical
#define KDM_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) // direct mapped to physical
#define PHYS_TO_K0(x) (U32(x) | 0x80000000) // physical to kseg0
#define PHYS_TO_K1(x) (U32(x) | 0xA0000000) // physical to kseg1
/* Address conversion macros */
#define K0_TO_K1(x) (U32(x) | 0xA0000000) /* kseg0 to kseg1 */
#define K1_TO_K0(x) (U32(x) & 0x9FFFFFFF) /* kseg1 to kseg0 */
#define K0_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) /* kseg0 to physical */
#define K1_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) /* kseg1 to physical */
#define KDM_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) /* direct mapped to physical */
#define PHYS_TO_K0(x) (U32(x) | 0x80000000) /* physical to kseg0 */
#define PHYS_TO_K1(x) (U32(x) | 0xA0000000) /* physical to kseg1 */
// Address predicates
/* Address predicates */
#define IS_KSEG0(x) (U32(x) >= K0BASE && U32(x) < K1BASE)
#define IS_KSEG1(x) (U32(x) >= K1BASE && U32(x) < K2BASE)
#define IS_KSEGDM(x) (U32(x) >= K0BASE && U32(x) < K2BASE)
@ -45,25 +43,25 @@
#define IS_KPTESEG(x) (U32(x) >= KPTE_SHDUBASE)
#define IS_KUSEG(x) (U32(x) < K0BASE)
// TLB size constants
/* TLB size constants */
#define NTLBENTRIES 31 /* entry 31 is reserved by rdb */
#define TLBHI_VPN2MASK 0xFFFFE000
#define TLBHI_VPN2SHIFT 13
#define TLBHI_PIDMASK 0xFF
#define TLBHI_PIDSHIFT 0
#define TLBHI_NPID 255 // 255 to fit in 8 bits
#define TLBHI_NPID 255 /* 255 to fit in 8 bits */
#define TLBLO_PFNMASK 0x3FFFFFC0
#define TLBLO_PFNSHIFT 6
#define TLBLO_CACHMASK 0x38 // cache coherency algorithm
#define TLBLO_CACHMASK 0x38 /* cache coherency algorithm */
#define TLBLO_CACHSHIFT 3
#define TLBLO_UNCACHED 0x10 // not cached
#define TLBLO_NONCOHRNT 0x18 // Cacheable non-coherent
#define TLBLO_EXLWR 0x28 // Exclusive write
#define TLBLO_D 0x4 // writeable
#define TLBLO_V 0x2 // valid bit
#define TLBLO_G 0x1 // global access bit
#define TLBLO_UNCACHED 0x10 /* not cached */
#define TLBLO_NONCOHRNT 0x18 /* Cacheable non-coherent */
#define TLBLO_EXLWR 0x28 /* Exclusive write */
#define TLBLO_D 0x4 /* writeable */
#define TLBLO_V 0x2 /* valid bit */
#define TLBLO_G 0x1 /* global access bit */
#define TLBINX_PROBE 0x80000000
#define TLBINX_INXMASK 0x3F
@ -88,104 +86,104 @@
/*
* Status register
*/
#define SR_CUMASK 0xF0000000 // coproc usable bits
#define SR_CUMASK 0xF0000000 /* coproc usable bits */
#define SR_CU3 0x80000000 // Coprocessor 3 usable
#define SR_CU2 0x40000000 // Coprocessor 2 usable
#define SR_CU1 0x20000000 // Coprocessor 1 usable
#define SR_CU0 0x10000000 // Coprocessor 0 usable
#define SR_RP 0x08000000 // Reduced power (quarter speed)
#define SR_FR 0x04000000 // MIPS III FP register mode
#define SR_RE 0x02000000 // Reverse endian
#define SR_ITS 0x01000000 // Instruction trace support
#define SR_BEV 0x00400000 // Use boot exception vectors
#define SR_TS 0x00200000 // TLB shutdown
#define SR_SR 0x00100000 // Soft reset occured
#define SR_CH 0x00040000 // Cache hit for last 'cache' op
#define SR_CE 0x00020000 // Create ECC
#define SR_DE 0x00010000 // ECC of parity does not cause error
#define SR_CU3 0x80000000 /* Coprocessor 3 usable */
#define SR_CU2 0x40000000 /* Coprocessor 2 usable */
#define SR_CU1 0x20000000 /* Coprocessor 1 usable */
#define SR_CU0 0x10000000 /* Coprocessor 0 usable */
#define SR_RP 0x08000000 /* Reduced power (quarter speed) */
#define SR_FR 0x04000000 /* MIPS III FP register mode */
#define SR_RE 0x02000000 /* Reverse endian */
#define SR_ITS 0x01000000 /* Instruction trace support */
#define SR_BEV 0x00400000 /* Use boot exception vectors */
#define SR_TS 0x00200000 /* TLB shutdown */
#define SR_SR 0x00100000 /* Soft reset occured */
#define SR_CH 0x00040000 /* Cache hit for last 'cache' op */
#define SR_CE 0x00020000 /* Create ECC */
#define SR_DE 0x00010000 /* ECC of parity does not cause error */
// Interrupt enable bits
// (NOTE: bits set to 1 enable the corresponding level interrupt)
#define SR_IMASK 0x0000FF00 // Interrupt mask
#define SR_IMASK8 0x00000000 // mask level 8
#define SR_IMASK7 0x00008000 // mask level 7
#define SR_IMASK6 0x0000C000 // mask level 6
#define SR_IMASK5 0x0000E000 // mask level 5
#define SR_IMASK4 0x0000F000 // mask level 4
#define SR_IMASK3 0x0000F800 // mask level 3
#define SR_IMASK2 0x0000FC00 // mask level 2
#define SR_IMASK1 0x0000FE00 // mask level 1
#define SR_IMASK0 0x0000FF00 // mask level 0
/* Interrupt enable bits */
/* (NOTE: bits set to 1 enable the corresponding level interrupt) */
#define SR_IMASK 0x0000FF00 /* Interrupt mask */
#define SR_IMASK8 0x00000000 /* mask level 8 */
#define SR_IMASK7 0x00008000 /* mask level 7 */
#define SR_IMASK6 0x0000C000 /* mask level 6 */
#define SR_IMASK5 0x0000E000 /* mask level 5 */
#define SR_IMASK4 0x0000F000 /* mask level 4 */
#define SR_IMASK3 0x0000F800 /* mask level 3 */
#define SR_IMASK2 0x0000FC00 /* mask level 2 */
#define SR_IMASK1 0x0000FE00 /* mask level 1 */
#define SR_IMASK0 0x0000FF00 /* mask level 0 */
#define SR_IBIT8 0x00008000 // bit level 8
#define SR_IBIT7 0x00004000 // bit level 7
#define SR_IBIT6 0x00002000 // bit level 6
#define SR_IBIT5 0x00001000 // bit level 5
#define SR_IBIT4 0x00000800 // bit level 4
#define SR_IBIT3 0x00000400 // bit level 3
#define SR_IBIT2 0x00000200 // bit level 2
#define SR_IBIT1 0x00000100 // bit level 1
#define SR_IBIT8 0x00008000 /* bit level 8 */
#define SR_IBIT7 0x00004000 /* bit level 7 */
#define SR_IBIT6 0x00002000 /* bit level 6 */
#define SR_IBIT5 0x00001000 /* bit level 5 */
#define SR_IBIT4 0x00000800 /* bit level 4 */
#define SR_IBIT3 0x00000400 /* bit level 3 */
#define SR_IBIT2 0x00000200 /* bit level 2 */
#define SR_IBIT1 0x00000100 /* bit level 1 */
#define SR_IMASKSHIFT 8
#define SR_KX 0x00000080 // extended-addr TLB vec in kernel
#define SR_SX 0x00000040 // xtended-addr TLB vec supervisor
#define SR_UX 0x00000020 // xtended-addr TLB vec in user mode
#define SR_KSU_MASK 0x00000018 // mode mask
#define SR_KSU_USR 0x00000010 // user mode
#define SR_KSU_SUP 0x00000008 // supervisor mode
#define SR_KSU_KER 0x00000000 // kernel mode
#define SR_ERL 0x00000004 // Error level, 1=>cache error
#define SR_EXL 0x00000002 // Exception level, 1=>exception
#define SR_IE 0x00000001 // interrupt enable, 1=>enable
#define SR_KX 0x00000080 /* extended-addr TLB vec in kernel */
#define SR_SX 0x00000040 /* xtended-addr TLB vec supervisor */
#define SR_UX 0x00000020 /* xtended-addr TLB vec in user mode */
#define SR_KSU_MASK 0x00000018 /* mode mask */
#define SR_KSU_USR 0x00000010 /* user mode */
#define SR_KSU_SUP 0x00000008 /* supervisor mode */
#define SR_KSU_KER 0x00000000 /* kernel mode */
#define SR_ERL 0x00000004 /* Error level, 1=>cache error */
#define SR_EXL 0x00000002 /* Exception level, 1=>exception */
#define SR_IE 0x00000001 /* interrupt enable, 1=>enable */
// Cause Register
#define CAUSE_BD 0x80000000 // Branch delay slot
#define CAUSE_CEMASK 0x30000000 // coprocessor error
/* Cause Register */
#define CAUSE_BD 0x80000000 /* Branch delay slot */
#define CAUSE_CEMASK 0x30000000 /* coprocessor error */
#define CAUSE_CESHIFT 28
// Interrupt pending bits
#define CAUSE_IP8 0x00008000 // External level 8 pending - COMPARE
#define CAUSE_IP7 0x00004000 // External level 7 pending - INT4
#define CAUSE_IP6 0x00002000 // External level 6 pending - INT3
#define CAUSE_IP5 0x00001000 // External level 5 pending - INT2
#define CAUSE_IP4 0x00000800 // External level 4 pending - INT1
#define CAUSE_IP3 0x00000400 // External level 3 pending - INT0
#define CAUSE_SW2 0x00000200 // Software level 2 pending
#define CAUSE_SW1 0x00000100 // Software level 1 pending
/* Interrupt pending bits */
#define CAUSE_IP8 0x00008000 /* External level 8 pending - COMPARE */
#define CAUSE_IP7 0x00004000 /* External level 7 pending - INT4 */
#define CAUSE_IP6 0x00002000 /* External level 6 pending - INT3 */
#define CAUSE_IP5 0x00001000 /* External level 5 pending - INT2 */
#define CAUSE_IP4 0x00000800 /* External level 4 pending - INT1 */
#define CAUSE_IP3 0x00000400 /* External level 3 pending - INT0 */
#define CAUSE_SW2 0x00000200 /* Software level 2 pending */
#define CAUSE_SW1 0x00000100 /* Software level 1 pending */
#define CAUSE_IPMASK 0x0000FF00 // Pending interrupt mask
#define CAUSE_IPMASK 0x0000FF00 /* Pending interrupt mask */
#define CAUSE_IPSHIFT 8
#define CAUSE_EXCMASK 0x0000007C // Cause code bits
#define CAUSE_EXCMASK 0x0000007C /* Cause code bits */
#define CAUSE_EXCSHIFT 2
// Cause register exception codes
/* Cause register exception codes */
#define EXC_CODE(x) ((x) << 2)
// Hardware exception codes
#define EXC_INT EXC_CODE(0) // interrupt
#define EXC_MOD EXC_CODE(1) // TLB mod
#define EXC_RMISS EXC_CODE(2) // Read TLB Miss
#define EXC_WMISS EXC_CODE(3) // Write TLB Miss
#define EXC_RADE EXC_CODE(4) // Read Address Error
#define EXC_WADE EXC_CODE(5) // Write Address Error
#define EXC_IBE EXC_CODE(6) // Instruction Bus Error
#define EXC_DBE EXC_CODE(7) // Data Bus Error
#define EXC_SYSCALL EXC_CODE(8) // SYSCALL
#define EXC_BREAK EXC_CODE(9) // BREAKpoint
#define EXC_II EXC_CODE(10) // Illegal Instruction
#define EXC_CPU EXC_CODE(11) // CoProcessor Unusable
#define EXC_OV EXC_CODE(12) // OVerflow
#define EXC_TRAP EXC_CODE(13) // Trap exception
#define EXC_VCEI EXC_CODE(14) // Virt. Coherency on Inst. fetch
#define EXC_FPE EXC_CODE(15) // Floating Point Exception
#define EXC_WATCH EXC_CODE(23) // Watchpoint reference
#define EXC_VCED EXC_CODE(31) // Virt. Coherency on data read
/* Hardware exception codes */
#define EXC_INT EXC_CODE(0) /* interrupt */
#define EXC_MOD EXC_CODE(1) /* TLB mod */
#define EXC_RMISS EXC_CODE(2) /* Read TLB Miss */
#define EXC_WMISS EXC_CODE(3) /* Write TLB Miss */
#define EXC_RADE EXC_CODE(4) /* Read Address Error */
#define EXC_WADE EXC_CODE(5) /* Write Address Error */
#define EXC_IBE EXC_CODE(6) /* Instruction Bus Error */
#define EXC_DBE EXC_CODE(7) /* Data Bus Error */
#define EXC_SYSCALL EXC_CODE(8) /* SYSCALL */
#define EXC_BREAK EXC_CODE(9) /* BREAKpoint */
#define EXC_II EXC_CODE(10) /* Illegal Instruction */
#define EXC_CPU EXC_CODE(11) /* CoProcessor Unusable */
#define EXC_OV EXC_CODE(12) /* OVerflow */
#define EXC_TRAP EXC_CODE(13) /* Trap exception */
#define EXC_VCEI EXC_CODE(14) /* Virt. Coherency on Inst. fetch */
#define EXC_FPE EXC_CODE(15) /* Floating Point Exception */
#define EXC_WATCH EXC_CODE(23) /* Watchpoint reference */
#define EXC_VCED EXC_CODE(31) /* Virt. Coherency on data read */
// C0_PRID Defines
/* C0_PRID Defines */
#define C0_IMPMASK 0xFF00
#define C0_IMPSHIFT 8
#define C0_REVMASK 0xFF
@ -193,106 +191,106 @@
#define C0_MAJREVSHIFT 4
#define C0_MINREVMASK 0xF
// Coprocessor 0 operations
#define C0_READI 0x1 // read ITLB entry addressed by C0_INDEX
#define C0_WRITEI 0x2 // write ITLB entry addressed by C0_INDEX
#define C0_WRITER 0x6 // write ITLB entry addressed by C0_RAND
#define C0_PROBE 0x8 // probe for ITLB entry addressed by TLBHI
#define C0_RFE 0x10 // restore for exception
/* Coprocessor 0 operations */
#define C0_READI 0x1 /* read ITLB entry addressed by C0_INDEX */
#define C0_WRITEI 0x2 /* write ITLB entry addressed by C0_INDEX */
#define C0_WRITER 0x6 /* write ITLB entry addressed by C0_RAND */
#define C0_PROBE 0x8 /* probe for ITLB entry addressed by TLBHI */
#define C0_RFE 0x10 /* restore for exception */
// 'cache' instruction definitions
/* 'cache' instruction definitions */
// Target cache
#define CACH_PI 0x0 // specifies primary inst. cache
#define CACH_PD 0x1 // primary data cache
#define CACH_SI 0x2 // secondary instruction cache
#define CACH_SD 0x3 // secondary data cache
/* Target cache */
#define CACH_PI 0x0 /* specifies primary inst. cache */
#define CACH_PD 0x1 /* primary data cache */
#define CACH_SI 0x2 /* secondary instruction cache */
#define CACH_SD 0x3 /* secondary data cache */
// Cache operations
#define C_IINV 0x0 // index invalidate (inst, 2nd inst)
#define C_IWBINV 0x0 // index writeback inval (d, sd)
#define C_ILT 0x4 // index load tag (all)
#define C_IST 0x8 // index store tag (all)
#define C_CDX 0xC // create dirty exclusive (d, sd)
#define C_HINV 0x10 // hit invalidate (all)
#define C_HWBINV 0x14 // hit writeback inv. (d, sd)
#define C_FILL 0x14 // fill (i)
#define C_HWB 0x18 // hit writeback (i, d, sd)
#define C_HSV 0x1C // hit set virt. (si, sd)
/* Cache operations */
#define C_IINV 0x0 /* index invalidate (inst, 2nd inst) */
#define C_IWBINV 0x0 /* index writeback inval (d, sd) */
#define C_ILT 0x4 /* index load tag (all) */
#define C_IST 0x8 /* index store tag (all) */
#define C_CDX 0xC /* create dirty exclusive (d, sd) */
#define C_HINV 0x10 /* hit invalidate (all) */
#define C_HWBINV 0x14 /* hit writeback inv. (d, sd) */
#define C_FILL 0x14 /* fill (i) */
#define C_HWB 0x18 /* hit writeback (i, d, sd) */
#define C_HSV 0x1C /* hit set virt. (si, sd) */
// Cache size definitions
#define ICACHE_SIZE 0x4000 // 16K
#define ICACHE_LINESIZE 32 // 8 words
/* Cache size definitions */
#define ICACHE_SIZE 0x4000 /* 16K */
#define ICACHE_LINESIZE 32 /* 8 words */
#define ICACHE_LINEMASK (ICACHE_LINESIZE - 1)
#define DCACHE_SIZE 0x2000 // 8K
#define DCACHE_LINESIZE 16 // 4 words
#define DCACHE_SIZE 0x2000 /* 8K */
#define DCACHE_LINESIZE 16 /* 4 words */
#define DCACHE_LINEMASK (DCACHE_LINESIZE - 1)
// C0_CONFIG register definitions
#define CONFIG_CM 0x80000000 // 1 == Master-Checker enabled
#define CONFIG_EC 0x70000000 // System Clock ratio
#define CONFIG_EC_1_1 0x6 // System Clock ratio 1 :1
#define CONFIG_EC_3_2 0x7 // System Clock ratio 1.5 :1
#define CONFIG_EC_2_1 0x0 // System Clock ratio 2 :1
#define CONFIG_EC_3_1 0x1 // System Clock ratio 3 :1
#define CONFIG_EP 0x0F000000 // Transmit Data Pattern
#define CONFIG_SB 0x00C00000 // Secondary cache block size
/* C0_CONFIG register definitions */
#define CONFIG_CM 0x80000000 /* 1 == Master-Checker enabled */
#define CONFIG_EC 0x70000000 /* System Clock ratio */
#define CONFIG_EC_1_1 0x6 /* System Clock ratio 1 :1 */
#define CONFIG_EC_3_2 0x7 /* System Clock ratio 1.5 :1 */
#define CONFIG_EC_2_1 0x0 /* System Clock ratio 2 :1 */
#define CONFIG_EC_3_1 0x1 /* System Clock ratio 3 :1 */
#define CONFIG_EP 0x0F000000 /* Transmit Data Pattern */
#define CONFIG_SB 0x00C00000 /* Secondary cache block size */
#define CONFIG_SS 0x00200000 // Split scache: 0 == I&D combined
#define CONFIG_SW 0x00100000 // scache port: 0==128, 1==64
#define CONFIG_EW 0x000C0000 // System Port width: 0==64, 1==32
#define CONFIG_SC 0x00020000 // 0 -> 2nd cache present
#define CONFIG_SM 0x00010000 // 0 -> Dirty Shared Coherency enable
#define CONFIG_BE 0x00008000 // Endian-ness: 1 --> BE
#define CONFIG_EM 0x00004000 // 1 -> ECC mode, 0 -> parity
#define CONFIG_EB 0x00002000 // Block order:1->sequent,0->subblock
#define CONFIG_SS 0x00200000 /* Split scache: 0 == I&D combined */
#define CONFIG_SW 0x00100000 /* scache port: 0==128, 1==64 */
#define CONFIG_EW 0x000C0000 /* System Port width: 0==64, 1==32 */
#define CONFIG_SC 0x00020000 /* 0 -> 2nd cache present */
#define CONFIG_SM 0x00010000 /* 0 -> Dirty Shared Coherency enable */
#define CONFIG_BE 0x00008000 /* Endian-ness: 1 --> BE */
#define CONFIG_EM 0x00004000 /* 1 -> ECC mode, 0 -> parity */
#define CONFIG_EB 0x00002000 /* Block order:1->sequent,0->subblock */
#define CONFIG_IC 0x00000E00 // Primary Icache size
#define CONFIG_DC 0x000001C0 // Primary Dcache size
#define CONFIG_IB 0x00000020 // Icache block size
#define CONFIG_DB 0x00000010 // Dcache block size
#define CONFIG_CU 0x00000008 // Update on Store-conditional
#define CONFIG_K0 0x00000007 // K0SEG Coherency algorithm
#define CONFIG_IC 0x00000E00 /* Primary Icache size */
#define CONFIG_DC 0x000001C0 /* Primary Dcache size */
#define CONFIG_IB 0x00000020 /* Icache block size */
#define CONFIG_DB 0x00000010 /* Dcache block size */
#define CONFIG_CU 0x00000008 /* Update on Store-conditional */
#define CONFIG_K0 0x00000007 /* K0SEG Coherency algorithm */
#define CONFIG_UNCACHED 0x00000002 // K0 is uncached
#define CONFIG_UNCACHED 0x00000002 /* K0 is uncached */
#define CONFIG_NONCOHRNT 0x00000003
#define CONFIG_COHRNT_EXLWR 0x00000005
#define CONFIG_SB_SHFT 22 // shift SB to bit position 0
#define CONFIG_IC_SHFT 9 // shift IC to bit position 0
#define CONFIG_DC_SHFT 6 // shift DC to bit position 0
#define CONFIG_BE_SHFT 15 // shift BE to bit position 0
#define CONFIG_SB_SHFT 22 /* shift SB to bit position 0 */
#define CONFIG_IC_SHFT 9 /* shift IC to bit position 0 */
#define CONFIG_DC_SHFT 6 /* shift DC to bit position 0 */
#define CONFIG_BE_SHFT 15 /* shift BE to bit position 0 */
// C0_TAGLO definitions for setting/getting cache states and physaddr bits
#define SADDRMASK 0xFFFFE000 // 31..13 -> scache paddr bits 35..17
#define SVINDEXMASK 0x00000380 // 9..7: prim virt index bits 14..12
#define SSTATEMASK 0x00001C00 // bits 12..10 hold scache line state
#define SINVALID 0x00000000 // invalid --> 000 == state 0
#define SCLEANEXCL 0x00001000 // clean exclusive --> 100 == state 4
#define SDIRTYEXCL 0x00001400 // dirty exclusive --> 101 == state 5
#define SECC_MASK 0x0000007F // low 7 bits are ecc for the tag
#define SADDR_SHIFT 4 // shift STagLo (31..13) to 35..17
/* C0_TAGLO definitions for setting/getting cache states and physaddr bits */
#define SADDRMASK 0xFFFFE000 /* 31..13 -> scache paddr bits 35..17 */
#define SVINDEXMASK 0x00000380 /* 9..7: prim virt index bits 14..12 */
#define SSTATEMASK 0x00001C00 /* bits 12..10 hold scache line state */
#define SINVALID 0x00000000 /* invalid --> 000 == state 0 */
#define SCLEANEXCL 0x00001000 /* clean exclusive --> 100 == state 4 */
#define SDIRTYEXCL 0x00001400 /* dirty exclusive --> 101 == state 5 */
#define SECC_MASK 0x0000007F /* low 7 bits are ecc for the tag */
#define SADDR_SHIFT 4 /* shift STagLo (31..13) to 35..17 */
#define PADDRMASK 0xFFFFFF00 // PTagLo31..8->prim paddr bits35..12
#define PADDR_SHIFT 4 // roll bits 35..12 down to 31..8
#define PSTATEMASK 0x00C0 // bits 7..6 hold primary line state
#define PINVALID 0x0000 // invalid --> 000 == state 0
#define PCLEANEXCL 0x0080 // clean exclusive --> 10 == state 2
#define PDIRTYEXCL 0x00C0 // dirty exclusive --> 11 == state 3
#define PPARITY_MASK 0x0001 // low bit is parity bit (even).
#define PADDRMASK 0xFFFFFF00 /* PTagLo31..8->prim paddr bits35..12 */
#define PADDR_SHIFT 4 /* roll bits 35..12 down to 31..8 */
#define PSTATEMASK 0x00C0 /* bits 7..6 hold primary line state */
#define PINVALID 0x0000 /* invalid --> 000 == state 0 */
#define PCLEANEXCL 0x0080 /* clean exclusive --> 10 == state 2 */
#define PDIRTYEXCL 0x00C0 /* dirty exclusive --> 11 == state 3 */
#define PPARITY_MASK 0x0001 /* low bit is parity bit (even). */
// C0_CACHE_ERR definitions.
#define CACHERR_ER 0x80000000 // 0: inst ref, 1: data ref
#define CACHERR_EC 0x40000000 // 0: primary, 1: secondary
#define CACHERR_ED 0x20000000 // 1: data error
#define CACHERR_ET 0x10000000 // 1: tag error
#define CACHERR_ES 0x08000000 // 1: external ref, e.g. snoo
#define CACHERR_EE 0x04000000 // error on SysAD bus
#define CACHERR_EB 0x02000000 // complicated, see spec.
#define CACHERR_EI 0x01000000 // complicated, see spec.
#define CACHERR_SIDX_MASK 0x003FFFF8 // secondary cache index
#define CACHERR_PIDX_MASK 0x00000007 // primary cache index
#define CACHERR_PIDX_SHIFT 12 // bits 2..0 are paddr14..12
/* C0_CACHE_ERR definitions. */
#define CACHERR_ER 0x80000000 /* 0: inst ref, 1: data ref */
#define CACHERR_EC 0x40000000 /* 0: primary, 1: secondary */
#define CACHERR_ED 0x20000000 /* 1: data error */
#define CACHERR_ET 0x10000000 /* 1: tag error */
#define CACHERR_ES 0x08000000 /* 1: external ref, e.g. snoo */
#define CACHERR_EE 0x04000000 /* error on SysAD bus */
#define CACHERR_EB 0x02000000 /* complicated, see spec. */
#define CACHERR_EI 0x01000000 /* complicated, see spec. */
#define CACHERR_SIDX_MASK 0x003FFFF8 /* secondary cache index */
#define CACHERR_PIDX_MASK 0x00000007 /* primary cache index */
#define CACHERR_PIDX_SHIFT 12 /* bits 2..0 are paddr14..12 */
/*
* R4000 family supports hardware watchpoints:
@ -311,57 +309,88 @@
#define WATCHLO_VALIDMASK 0xFFFFFFFB
#define WATCHHI_VALIDMASK 0x0000000F
// Coprocessor 0 registers
#define C0_INX C_REG(0)
#define C0_RAND C_REG(1)
#define C0_ENTRYLO0 C_REG(2)
#define C0_ENTRYLO1 C_REG(3)
#define C0_CONTEXT C_REG(4)
#define C0_PAGEMASK C_REG(5) // page mask
#define C0_WIRED C_REG(6) // # wired entries in tlb
#define C0_BADVADDR C_REG(8)
#define C0_COUNT C_REG(9) // free-running counter
#define C0_ENTRYHI C_REG(10)
#define C0_COMPARE C_REG(11) // counter comparison reg.
#define C0_SR C_REG(12)
#define C0_CAUSE C_REG(13)
#define C0_EPC C_REG(14)
#define C0_PRID C_REG(15) // revision identifier
#define C0_CONFIG C_REG(16) // hardware configuration
#define C0_LLADDR C_REG(17) // load linked address
#define C0_WATCHLO C_REG(18) // watchpoint
#define C0_WATCHHI C_REG(19) // watchpoint
#define C0_ECC C_REG(26) // S-cache ECC and primary parity
#define C0_CACHE_ERR C_REG(27) // cache error status
#define C0_TAGLO C_REG(28) // cache operations
#define C0_TAGHI C_REG(29) // cache operations
#define C0_ERROR_EPC C_REG(30) // ECC error prg. counter
/* Coprocessor 0 registers */
#ifdef _LANGUAGE_C
#define C0_INX 0
#define C0_RAND 1
#define C0_ENTRYLO0 2
#define C0_ENTRYLO1 3
#define C0_CONTEXT 4
#define C0_PAGEMASK 5 /* page mask */
#define C0_WIRED 6 /* # wired entries in tlb */
#define C0_BADVADDR 8
#define C0_COUNT 9 /* free-running counter */
#define C0_ENTRYHI 10
#define C0_COMPARE 11 /* counter comparison reg. */
#define C0_SR 12
#define C0_CAUSE 13
#define C0_EPC 14
#define C0_PRID 15 /* revision identifier */
#define C0_CONFIG 16 /* hardware configuration */
#define C0_LLADDR 17 /* load linked address */
#define C0_WATCHLO 18 /* watchpoint */
#define C0_WATCHHI 19 /* watchpoint */
#define C0_ECC 26 /* S-cache ECC and primary parity */
#define C0_CACHE_ERR 27 /* cache error status */
#define C0_TAGLO 28 /* cache operations */
#define C0_TAGHI 29 /* cache operations */
#define C0_ERROR_EPC 30 /* ECC error prg. counter */
#else
#define C0_INX $0
#define C0_RAND $1
#define C0_ENTRYLO0 $2
#define C0_ENTRYLO1 $3
#define C0_CONTEXT $4
#define C0_PAGEMASK $5 /* page mask */
#define C0_WIRED $6 /* # wired entries in tlb */
#define C0_BADVADDR $8
#define C0_COUNT $9 /* free-running counter */
#define C0_ENTRYHI $10
#define C0_COMPARE $11 /* counter comparison reg. */
#define C0_SR $12
#define C0_CAUSE $13
#define C0_EPC $14
#define C0_PRID $15 /* revision identifier */
#define C0_CONFIG $16 /* hardware configuration */
#define C0_LLADDR $17 /* load linked address */
#define C0_WATCHLO $18 /* watchpoint */
#define C0_WATCHHI $19 /* watchpoint */
#define C0_ECC $26 /* S-cache ECC and primary parity */
#define C0_CACHE_ERR $27 /* cache error status */
#define C0_TAGLO $28 /* cache operations */
#define C0_TAGHI $29 /* cache operations */
#define C0_ERROR_EPC $30 /* ECC error prg. counter */
#endif
// floating-point status register
#define C1_FPCSR C_REG(31)
/* floating-point status register */
#ifdef _LANGUAGE_C
#define C1_FPCSR 31
#else
#define C1_FPCSR $31
#endif
#define FPCSR_FS 0x01000000 // flush denorm to zero
#define FPCSR_C 0x00800000 // condition bit
#define FPCSR_CE 0x00020000 // cause: unimplemented operation
#define FPCSR_CV 0x00010000 // cause: invalid operation
#define FPCSR_CZ 0x00008000 // cause: division by zero
#define FPCSR_CO 0x00004000 // cause: overflow
#define FPCSR_CU 0x00002000 // cause: underflow
#define FPCSR_CI 0x00001000 // cause: inexact operation
#define FPCSR_EV 0x00000800 // enable: invalid operation
#define FPCSR_EZ 0x00000400 // enable: division by zero
#define FPCSR_EO 0x00000200 // enable: overflow
#define FPCSR_EU 0x00000100 // enable: underflow
#define FPCSR_EI 0x00000080 // enable: inexact operation
#define FPCSR_FV 0x00000040 // flag: invalid operation
#define FPCSR_FZ 0x00000020 // flag: division by zero
#define FPCSR_FO 0x00000010 // flag: overflow
#define FPCSR_FU 0x00000008 // flag: underflow
#define FPCSR_FI 0x00000004 // flag: inexact operation
#define FPCSR_RM_MASK 0x00000003 // rounding mode mask
#define FPCSR_RM_RN 0x00000000 // round to nearest
#define FPCSR_RM_RZ 0x00000001 // round to zero
#define FPCSR_RM_RP 0x00000002 // round to positive infinity
#define FPCSR_RM_RM 0x00000003 // round to negative infinity
#define FPCSR_FS 0x01000000 /* flush denorm to zero */
#define FPCSR_C 0x00800000 /* condition bit */
#define FPCSR_CE 0x00020000 /* cause: unimplemented operation */
#define FPCSR_CV 0x00010000 /* cause: invalid operation */
#define FPCSR_CZ 0x00008000 /* cause: division by zero */
#define FPCSR_CO 0x00004000 /* cause: overflow */
#define FPCSR_CU 0x00002000 /* cause: underflow */
#define FPCSR_CI 0x00001000 /* cause: inexact operation */
#define FPCSR_EV 0x00000800 /* enable: invalid operation */
#define FPCSR_EZ 0x00000400 /* enable: division by zero */
#define FPCSR_EO 0x00000200 /* enable: overflow */
#define FPCSR_EU 0x00000100 /* enable: underflow */
#define FPCSR_EI 0x00000080 /* enable: inexact operation */
#define FPCSR_FV 0x00000040 /* flag: invalid operation */
#define FPCSR_FZ 0x00000020 /* flag: division by zero */
#define FPCSR_FO 0x00000010 /* flag: overflow */
#define FPCSR_FU 0x00000008 /* flag: underflow */
#define FPCSR_FI 0x00000004 /* flag: inexact operation */
#define FPCSR_RM_MASK 0x00000003 /* rounding mode mask */
#define FPCSR_RM_RN 0x00000000 /* round to nearest */
#define FPCSR_RM_RZ 0x00000001 /* round to zero */
#define FPCSR_RM_RP 0x00000002 /* round to positive infinity */
#define FPCSR_RM_RM 0x00000003 /* round to negative infinity */
#endif

94
include/ultra64/asm.h
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@ -6,55 +6,107 @@
#define _MIPS_ISA_MIPS2 2
#define _MIPS_ISA_MIPS3 3
#define _MIPS_ISA_MIPS4 4
#define _MIPS_SIM_ABI32 1 /* MIPS MSIG calling convention */
#define _MIPS_SIM_NABI32 2 /* MIPS new 32-bit abi */
/* NABI32 is 64bit calling convention but 32bit type sizes) */
#define _MIPS_SIM_ABI64 3 /* MIPS 64 calling convention */
#endif
#ifndef _LANGUAGE_C
#ifdef __GNUC__
#define TYPE(x, t) .type x, @t
#define SIZE(x) .size x, . - x
#else
#define TYPE(x, t)
#define SIZE(x)
#endif
#define LEAF(x) \
.balign 4 ;\
.align 2 ;\
.globl x ;\
.type x, @function ;\
TYPE(x, function) ;\
.ent x, 0 ;\
x: ;\
.ent x, 0 ;\
.frame $sp, 0, $ra
.frame sp, 0, ra
#define XLEAF(x) \
.balign 4 ;\
.align 2 ;\
.globl x ;\
.type x, @function ;\
x: ;\
.aent x, 0
TYPE(x, function) ;\
.aent x, 0 ;\
x:
#define NESTED(x, fsize, ra) \
.globl x ;\
.ent x, 0 ;\
x: ;\
.ent x, 0 ;\
.frame $sp, fsize, ra
.frame sp, fsize, ra
#define XNESTED(x) \
.globl x ;\
x: ;\
.aent x, 0
.aent x, 0 ;\
x:
#define END(x) \
.size x, . - x ;\
SIZE(x) ;\
.end x
#define IMPORT(x, size) \
.extern x, size
#define EXPORT(x) \
.globl x ;\
x:
#ifdef __sgi
#define IMPORT(sym, size) \
.extern sym, size
#else
#define IMPORT(sym, size)
#endif
#define DATA(x) \
.balign 4 ;\
.align 2 ;\
.globl x ;\
.type x, @object ;\
TYPE(x, object) ;\
x:
#define ENDDATA(x) \
.size x, . - x
SIZE(x)
#define MFC0(dst, src) \
.set noreorder; mfc0 dst, src; .set reorder
#define MTC0(dst, src) \
.set noreorder; mtc0 dst, src; .set reorder
#define CACHE(op, base) \
.set noreorder; cache op, base; .set reorder
#define CFC1(dst, src) \
.set noreorder; cfc1 dst, src; .set reorder
#define CTC1(src, dst) \
.set noreorder; ctc1 src, dst; .set reorder
#define NOP \
.set noreorder; nop; .set reorder
#define TLBWI \
.set noreorder; tlbwi; .set reorder
#define TLBR \
.set noreorder; tlbr; .set reorder
#define TLBP \
.set noreorder; tlbp; .set reorder
#ifndef __GNUC__
#define ABS(x, y) \
.globl x; \
x = y
#else
#define ABS(x, y) \
.globl x; \
.set x, y
#endif
#endif
@ -62,11 +114,11 @@
* Stack Alignment
*/
#if (_MIPS_SIM == _ABIO32)
#define NARGSAVE 4 // space for 4 args must be allocated
#define NARGSAVE 4 /* space for 4 args must be allocated */
#define ALSZ (8-1)
#define ALMASK ~(8-1)
#elif (_MIPS_SIM == _ABIN32 || _MIPS_SIM == _ABI64)
#define NARGSAVE 0 // no caller responsibilities
#define NARGSAVE 0 /* no caller responsibilities */
#define ALSZ (16-1)
#define ALMASK ~(16-1)
#endif

272
include/ultra64/bbskapi.h Normal file
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@ -0,0 +1,272 @@
/**
* @file bbskapi.h
*
* This file contains the external API for the iQue Player's Secure Kernel Calls.
*
* Applications require permission to call particular Secure Kernel Calls, defined in the associated Ticket.
* Most are not callable by games.
*/
#ifndef BB_SKAPI_H
#define BB_SKAPI_H
#include "ultratypes.h"
#define SKC_OK 0
#define SKC_RECRYPT_INVALID 1
#define SKC_RECRYPT_2 2 // Complete?
#define SKC_RECRYPT_3 3 // Partial?
#define SKC_RECRYPT_4 4 // Beginning?
#define SKC_INVALID_ARGS -1
#define SKC_INVALID_TSRL -2
#define SKC_INVALID_CARL -3
#define SKC_INVALID_CPRL -4
#define SKC_INVALID_CERT -9
#define SKC_NO_PERMISSION -11
typedef struct BbAppLaunchCrls BbAppLaunchCrls;
typedef struct BbCertBase BbCertBase;
typedef struct BbEccSig BbEccSig;
typedef struct BbRecryptList BbRecryptList;
typedef struct BbShaHash BbShaHash;
typedef struct BbTicketBundle BbTicketBundle;
/**
* Retrieves the console's unique BBID.
*
* @param bbId Location to write the BBID to. Must be a pointer to cached DRAM with 4-byte alignment.
* @return
* SKC_NO_PERMISSION If called with insufficient permission.
* SKC_INVALID_ARGS If the supplied pointer is not valid.
* SKC_OK Otherwise.
*/
s32 skGetId(u32* bbId);
/**
* Prepares to launch an application.
* The provided ticket bundle is verified and made the active ticket bundle.
* The AES decryption hardware is prepared.
*
* @param bundle Ticket Bundle associated with this application.
* @param crls Application Certificate Revocation Lists to check when verifying the ticket bundle.
* The ticket bundle must be signed by the Root signature without going through any
* revoked certificates.
* @param recryptList System Recrypt List (encrypted and digitally signed)
* @return
* SKC_INVALID_ARGS If any inputs are or contain invalid pointers,
* or the ticket is not for this console,
* or the ticket is for a trial that has expired.
* SKC_INVALID_TSRL If the provided TSRL revocation list is invalid.
* SKC_INVALID_CARL If the provided CARL revocation list is invalid.
* SKC_INVALID_CPRL If the provided CPRL revocation list is invalid.
* SKC_INVALID_CERT If a digital certificate was revoked by one of the revocation lists.
* SKC_RECRYPT_3 If the recrypt state for this app is not in an acceptable state to be launched.
* SKC_RECRYPT_4 If the recrypt state for this app is not in an acceptable state to be launched.
* SKC_NO_PERMISSION If called with insufficient permission.
* SKC_OK Otherwise.
*/
s32 skLaunchSetup(BbTicketBundle* bundle, BbAppLaunchCrls* crls, BbRecryptList* recryptList);
/**
* Launches a prepared application that is assumed to have been loaded into memory at the entrypoint between calling
* skLaunchSetup and calling this. skLaunchSetup must have been called prior to set the active ticket bundle.
*
* @param entrypoint The entrypoint address of the app to launch.
*
* @return
* SKC_INVALID_ARGS If the entrypoint is an invalid pointer,
* or if content failed a hash check for non-recrypted apps,
* or if the content is an expired trial.
* SKC_NO_PERMISSION If called with insufficient permission.
* @note Does not return if the call is successful.
*/
s32 skLaunch(void* entrypoint);
/**
* Verifies whether a provided Recrypt List is valid.
*
* @param recryptList Pointer to the (encrypted and digitally signed) recrypt list to verify.
* @return
* SKC_OK If the recrypt list is valid
* SKC_INVALID_ARGS If the recrypt list is invalid
* (e.g. contains invalid pointers or its ECDSA signature fails to verify)
* SKC_NO_PERMISSION If called with insufficient permission.
*/
s32 skRecryptListValid(BbRecryptList* recryptList);
/**
* Begins a new recryption task. Content downloaded is initially encrypted with the Common Key but may be re-encrypted
* with a new randomly generated AES key if the recrypt flag is set in the content metadata. Like with skLaunchSetup,
* the provided ticket bundle is first verified before being made the active ticket bundle.
*
* @param bundle The ticket bundle associated with the content that will be recrypted.
* @param crls Application Certificate Revocation Lists to check when verifying the ticket bundle.
* The ticket bundle must be signed by the Root signature without going through any
* revoked certificates.
* @param recryptList The recrypt list that the AES key will be saved to, after being encrypted with the
* console-specific recrypt list key.
* @return
* SKC_RECRYPT_INVALID If called on a ticket bundle that does not have the recrypt flag set.
* SKC_INVALID_ARGS If any inputs are or contain invalid pointers,
* or the ticket is not for this console,
* or the ticket is for a trial that has expired.
* SKC_INVALID_TSRL If the provided TSRL revocation list is invalid.
* SKC_INVALID_CARL If the provided CARL revocation list is invalid.
* SKC_INVALID_CPRL If the provided CPRL revocation list is invalid.
* SKC_INVALID_CERT If a digital certificate was revoked by one of the revocation lists.
* SKC_NO_PERMISSION If called with insufficient permission.
* Otherwise, one of SKC_RECRYPT_* will be returned communicating the initial state of the recryption process.
*/
s32 skRecryptBegin(BbTicketBundle* bundle, BbAppLaunchCrls* crls, BbRecryptList* recryptList);
/**
* Recrypts the provided data, using the previously set context.
* Must be called following skRecryptBegin.
*
* @param buf Pointer to app content to encrypt and hash.
* @param size Amount of data to process in this buffer.
* @return
* SKC_INVALID_ARGS If the provided buffer is not fully contained in RAM or is otherwise invalid.
* SKC_NO_PERMISSION If called with insufficient permission.
* SKC_OK Otherwise.
*/
s32 skRecryptData(u8* buf, u32 size);
/**
* Resumes a partially-complete recryption. The last chunk of successfully-recrypted data must be provided in order to
* set the AES-128-CBC Initialization Vector to continue recryption of the next chunk.
* Must be called following skRecryptBegin.
*
* @param buf Pointer to last chunk of successfully-recrypted content.
* @param size Amount of data available.
* @return
* SKC_INVALID_ARGS If the provided buffer is not fully contained in RAM or is otherwise invalid.
* SKC_NO_PERMISSION If called with insufficient permission.
* SKC_OK Otherwise.
*/
s32 skRecryptComputeState(u8* buf, u32 size);
/**
* Concludes the recryption process. The SHA-1 hash of the content, computed during recryption, is checked against the
* hash in the active ticket bundle; if it passes, the recrypt list entry for the active content is updated to indicate
* that recryption is complete and was successful.
*
* @param recryptList The (encrypted and digitally signed) recrypt list to update.
* @return
* SKC_OK If recryption succeeded.
* SKC_INVALID_ARGS If recryption failed (e.g. if the hash of the content did not match the hash in the ticket bundle)
* or if the provided recrypt list is invalid or cannot find the entry for the content.
* SKC_NO_PERMISSION If called with insufficient permission.
*/
s32 skRecryptEnd(BbRecryptList* recryptList);
/**
* Generates a digital signature for the provided SHA-1 hash (treated as a message) using the Elliptic Curve Digital
* Signature Algorithm (ECDSA) on the curve sect233r1 with the console's ECDSA Private Key. Appends an identity of 1 to
* the end of the message prior to signing.
*
* @param hash The SHA-1 hash to sign.
* @param outSignature The resulting ECDSA digital signature.
* @return
* SKC_INVALID_ARGS If either of the arguments is an invalid pointer.
* SKC_NO_PERMISSION If called with insufficient permission.
* SKC_OK Otherwise.
*/
s32 skSignHash(BbShaHash* hash, BbEccSig* outSignature);
/**
* Verifies a SHA-1 hash (treated as a message) against a digital signature using either the Elliptic Curve Digital
* Signature Algorithm (ECDSA) or the RSA Digital Signature Algorithm. For RSA, either 2048-bit or 4096-bit signatures
* can be recognized.
*
* For verifying self-signed (e.g. via skSignHash) ECDSA signatures the certificate chain and revocation lists are not
* required and may be passed as NULL, the public key is the console's own ECDSA public key. For verifying other types
* of signatures, a valid certificate chain and certificate revocation lists must be provided, in which case the
* signature must be signed by the Root certificate without going through any revoked certificates.
*
* This can only verify hashes signed with an identity of 1, such as those signed via skSignHash.
*
* @param hash The SHA-1 hash to check the signature of.
* @param signature The signature to compare against. May be an ECDSA, RSA2048 or RSA4096 signature.
* @param certChain Certificate Chain, NULL-terminated list of certificate pointers.
* Not required for self-signed ECDSA signatures and must be NULL in that case.
* Should not be more than 5 certificates long.
* Should end on the Root signature.
* @param crls Certificate Revocation Lists to check certificates against. Not required for self-signed ECDSA signatures.
* @return
* SKC_OK If the hash was successfully verified against the signature.
* SKC_INVALID_ARGS If any arguments are invalid pointers,
* or the hash could not be verified against the digital signature,
* or the certificate chain was invalid,
* or if any certificate revocation lists were invalid.
* SKC_INVALID_CERT If a digital certificate was revoked by one of the revocation lists.
* SKC_NO_PERMISSION If called with insufficient permission.
*/
s32 skVerifyHash(BbShaHash* hash, u32* signature, BbCertBase** certChain, BbAppLaunchCrls* crls);
/**
* Retrieves the consumption counters for all currently-tracked applications and the Ticket ID (TID) Window.
*
* The TID Window determines the TID for the first counter (cc[0]), the other counters (cc[i]) are associated with
* tidWindow + i.
*
* The consumption counters track either the number of minutes that a trial app has been played for, or the number of
* times a trial app has been launched.
*
* @param tidWindow The location to save the TID window to.
* @param cc An array of 26 u16s to save the consumption counters into.
* @return
* SKC_INVALID_ARGS If either pointer is invalid or there is not enough room to save all the consumption counters.
* SKC_NO_PERMISSION If called with insufficient permission.
* SKC_OK Otherwise.
*/
s32 skGetConsumption(u16* tidWindow, u16 cc[26]);
/**
* Increments the Ticket ID Window by 1 and moves all consumption counters down by 1 slot to match the new window. The
* counter previously at position 0 is forgotten.
*
* @return
* SKC_NO_PERMISSION If called with insufficient permission.
* SKC_INVALID_ARGS If the resulting state could not be saved internally.
* SKC_OK If success.
*/
s32 skAdvanceTicketWindow(void);
/**
* Overrides the trial limit and trial type stored in the currently loaded ticket.
*
* @param limit The new trial limit. Either a length of time or the number of allowed launches, depending on trial type.
* @param code The new trial type
* 0 = Time-limited in minutes, call skKeepAlive periodically
* 1 = Limited by number of launches
* 2 = Time-limited in minutes, no need to call skKeepAlive (TOVERIFY)
* @return
* SKC_OK If success.
* SKC_INVALID_ARGS If no ticket is currently loaded.
* SKC_NO_PERMISSION If called with insufficient permission.
*/
s32 skSetLimit(u16 limit, u16 code);
/**
* Returns to the system menu.
*
* @return
* SKC_NO_PERMISSION If called with insufficient permission.
* @note Does not return if called with permission.
*/
s32 skExit(void);
/**
* Keeps trial applications alive.
*
* The hardware trial timer does not have a very long period so must be refreshed periodically by calling this function.
* This function updates the timer and checks for an expiry.
*
* @return
* SKC_NO_PERMISSION If called with insufficient permission.
* SKC_OK Otherwise.
* @note This function may not return if it detects the trial has expired.
*/
s32 skKeepAlive(void);
#endif

275
include/ultra64/bcp.h Normal file
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@ -0,0 +1,275 @@
#ifndef BCP_H
#define BCP_H
#include "rcp.h"
/******************************************************************************
* Additional MIPS Interface (MI) Registers
*/
/**
* Accesses to this register outside of Secure Mode cause an NMI to transfer control
* to the Secure Kernel.
*
* [25] ?: System software writes to this bit when launching an app or game
* [24] SK RAM Access: Set to 1 to enable access to 0x8000 bytes at 0x1FC40000
* [7] Secure Trap Cause: Memory card removed
* [6] Secure Trap Cause: Power button pressed
* [5] Secure Trap Cause: MI Error
* [4] Secure Trap Cause: PI Error
* [3] Secure Trap Cause: Timer expired
* [2] Secure Trap Cause: Syscall via read of this register outside of secure mode
* [1] Boot ROM Swap: 0 = SK mapped at 0x1FC00000, Boot ROM mapped at 0x1FC20000
* 1 = Boot ROM mapped at 0x1FC00000, SK mapped at 0x1FC20000
* [0] Secure Mode: 0 = not in secure mode
* 1 = in secure mode
*/
#define MI_SECURE_EXCEPTION_REG (MI_BASE_REG + 0x14)
/**
* Read:
* [25] MD (active, 1 if card is currently disconnected else 0)
* [24] Power Button (active, 1 if button is currently pressed else 0)
* [13] MD (pending interrupt)
* [12] Power Button (pending interrupt)
* [11] USB1
* [10] USB0
* [ 9] PI_ERR
* [ 8] IDE
* [ 7] AES
* [ 6] FLASH
* [ 5] DP
* [ 4] PI
* [ 3] VI
* [ 2] AI
* [ 1] SI
* [ 0] SP
*
* Write:
* [13] Clear MD Interrupt
*/
#define MI_EX_INTR_REG (MI_BASE_REG + 0x38)
/*
* MI_EX_INTR_REG: read bits
*/
#define MI_EX_INTR_SP (1 << 0)
#define MI_EX_INTR_SI (1 << 1)
#define MI_EX_INTR_AI (1 << 2)
#define MI_EX_INTR_VI (1 << 3)
#define MI_EX_INTR_PI (1 << 4)
#define MI_EX_INTR_DP (1 << 5)
#define MI_EX_INTR_FLASH (1 << 6)
#define MI_EX_INTR_AES (1 << 7)
#define MI_EX_INTR_IDE (1 << 8)
#define MI_EX_INTR_PI_ERR (1 << 9)
#define MI_EX_INTR_USB0 (1 << 10)
#define MI_EX_INTR_USB1 (1 << 11)
#define MI_EX_INTR_PWR_BTN (1 << 12)
#define MI_EX_INTR_MD (1 << 13)
#define MI_EX_INTR_PWR_BTN_PRESSED (1 << 24) /* updated in real-time, unrelated to interrupt */
#define MI_EX_INTR_CARD_NOT_PRESENT (1 << 25) /* updated in real-time, unrelated to interrupt */
#define MI_EX_INTR_ALL \
(MI_EX_INTR_FLASH | MI_EX_INTR_AES | MI_EX_INTR_IDE | MI_EX_INTR_PI_ERR | \
MI_EX_INTR_USB0 | MI_EX_INTR_USB1 | MI_EX_INTR_PWR_BTN | MI_EX_INTR_MD)
/*
* MI_EX_INTR_REG: write bits
*/
#define MI_EX_INTR_CLR_MD (1 << 13)
/**
* Write:
* [27:26] Set/Clear MD
* [25:24] Set/Clear BUTTON
* [23:22] Set/Clear USB1
* [21:20] Set/Clear USB0
* [19:18] Set/Clear PI_ERR
* [17:16] Set/Clear IDE
* [15:14] Set/Clear AES
* [13:12] Set/Clear FLASH
* [11:10] Set/Clear DP
* [ 9: 8] Set/Clear PI
* [ 7: 6] Set/Clear VI
* [ 5: 4] Set/Clear AI
* [ 3: 2] Set/Clear SI
* [ 1: 0] Set/Clear SP
*
* Read:
* [13] MD
* [12] BUTTON
* [11] USB1
* [10] USB0
* [ 9] PI_ERR
* [ 8] IDE
* [ 7] AES
* [ 6] FLASH
* [ 5] DP
* [ 4] PI
* [ 3] VI
* [ 2] AI
* [ 1] SI
* [ 0] SP
*/
#define MI_EX_INTR_MASK_REG (MI_BASE_REG + 0x3C)
/*
* MI_EX_INTR_MASK_REG: write bits
*/
#define MI_EX_INTR_MASK_CLR_SP (1 << 0) /* clear SP mask */
#define MI_EX_INTR_MASK_SET_SP (1 << 1) /* set SP mask */
#define MI_EX_INTR_MASK_CLR_SI (1 << 2) /* clear SI mask */
#define MI_EX_INTR_MASK_SET_SI (1 << 3) /* set SI mask */
#define MI_EX_INTR_MASK_CLR_AI (1 << 4) /* clear AI mask */
#define MI_EX_INTR_MASK_SET_AI (1 << 5) /* set AI mask */
#define MI_EX_INTR_MASK_CLR_VI (1 << 6) /* clear VI mask */
#define MI_EX_INTR_MASK_SET_VI (1 << 7) /* set VI mask */
#define MI_EX_INTR_MASK_CLR_PI (1 << 8) /* clear PI mask */
#define MI_EX_INTR_MASK_SET_PI (1 << 9) /* set PI mask */
#define MI_EX_INTR_MASK_CLR_DP (1 << 10) /* clear DP mask */
#define MI_EX_INTR_MASK_SET_DP (1 << 11) /* set DP mask */
#define MI_EX_INTR_MASK_CLR_FLASH (1 << 12) /* clear FLASH mask */
#define MI_EX_INTR_MASK_SET_FLASH (1 << 13) /* set FLASH mask */
#define MI_EX_INTR_MASK_CLR_AES (1 << 14) /* clear AES mask */
#define MI_EX_INTR_MASK_SET_AES (1 << 15) /* set AES mask */
#define MI_EX_INTR_MASK_CLR_IDE (1 << 16) /* clear IDE mask */
#define MI_EX_INTR_MASK_SET_IDE (1 << 17) /* set IDE mask */
#define MI_EX_INTR_MASK_CLR_PI_ERR (1 << 18) /* clear PI_ERR mask */
#define MI_EX_INTR_MASK_SET_PI_ERR (1 << 19) /* set PI_ERR mask */
#define MI_EX_INTR_MASK_CLR_USB0 (1 << 20) /* clear USB0 mask */
#define MI_EX_INTR_MASK_SET_USB0 (1 << 21) /* set USB0 mask */
#define MI_EX_INTR_MASK_CLR_USB1 (1 << 22) /* clear USB1 mask */
#define MI_EX_INTR_MASK_SET_USB1 (1 << 23) /* set USB1 mask */
#define MI_EX_INTR_MASK_CLR_PWR_BTN (1 << 24) /* clear PWR_BTN mask */
#define MI_EX_INTR_MASK_SET_PWR_BTN (1 << 25) /* set PWR_BTN mask */
#define MI_EX_INTR_MASK_CLR_MD (1 << 26) /* clear MD mask */
#define MI_EX_INTR_MASK_SET_MD (1 << 27) /* set MD mask */
/*
* MI_EX_INTR_MASK_REG: read bits
*/
#define MI_EX_INTR_MASK_SP (1 << 0) /* SP intr mask */
#define MI_EX_INTR_MASK_SI (1 << 1) /* SI intr mask */
#define MI_EX_INTR_MASK_AI (1 << 2) /* AI intr mask */
#define MI_EX_INTR_MASK_VI (1 << 3) /* VI intr mask */
#define MI_EX_INTR_MASK_PI (1 << 4) /* PI intr mask */
#define MI_EX_INTR_MASK_DP (1 << 5) /* DP intr mask */
#define MI_EX_INTR_MASK_FLASH (1 << 6) /* FLASH intr mask */
#define MI_EX_INTR_MASK_AES (1 << 7) /* AES intr mask */
#define MI_EX_INTR_MASK_IDE (1 << 8) /* IDE intr mask */
#define MI_EX_INTR_MASK_PI_ERR (1 << 9) /* PI_ERR intr mask */
#define MI_EX_INTR_MASK_USB0 (1 << 10) /* USB0 intr mask */
#define MI_EX_INTR_MASK_USB1 (1 << 11) /* USB1 intr mask */
#define MI_EX_INTR_MASK_PWR_BTN (1 << 12) /* PWR_BTN intr mask */
#define MI_EX_INTR_MASK_MD (1 << 13) /* MD intr mask */
/******************************************************************************
* Additional Parallel Interface (PI) Registers
*/
/**
* Write:
* [31] Execute command after write
* [30] Interrupt when done
* [29:24] ?
* [23:16] NAND Command
* [15] ?
* [14] Buffer Select
* [13:12] Device Select
* [11] Do Error Correction
* [10] NAND Command is Multi-Cycle
* [ 9: 0] Data Transfer Length in Bytes
*
* Writing 0 to this register clears the interrupt
*
* Read:
* [31] Busy
* [11] Single-Bit Error Corrected
* [10] Double-Bit Error Uncorrectable
*/
#define PI_NAND_CTRL_REG (PI_BASE_REG + 0x48)
/**
* PI internal buffer DMA read length. Writes initiate a DMA from RDRAM to the PI buffer.
*/
#define PI_EX_RD_LEN_REG (PI_BASE_REG + 0x58)
/**
* PI internal buffer DMA write length. Writes initiate a DMA from the PI buffer to RDRAM.
*/
#define PI_EX_WR_LEN_REG (PI_BASE_REG + 0x5C)
/**
* [31:16] Box ID
* [31:30] Hardware Revision? (osInitialize checks this and sets __osBbIsBb to 2 if != 0)
* [29:27] ?? (not seen)
* [26:25] ?? (system clock speed identifier?)
* [24:22] ?? (bootrom, checked against MI_10_REG and copied there if mismatch)
* [21:16] ?? (not seen)
* [ 7: 4] GPIO direction control
* [7] RTC Data output enable
* [6] RTC Clock output enable
* [5] Error LED output enable
* [4] Power Control output enable
* [ 3: 0] GPIO in/out value
* [3] RTC Data output value (0=low, 1=high)
* [2] RTC Clock output value (0=low, 1=high)
* [1] Error LED (0=on, 1=off)
* [0] Power Control (0=off, 1=on)
*/
#define PI_GPIO_REG (PI_BASE_REG + 0x60)
/* Box ID */
#define PI_GPIO_GET_BOXID(reg) ((reg) >> 16)
#define PI_GPIO_IS_HW_V2(reg) ((reg) & (3 << 30))
/* GPIO: Input/Output enables */
#define PI_GPIO_I_PWR ((0 << 0) << 4)
#define PI_GPIO_O_PWR ((1 << 0) << 4)
#define PI_GPIO_I_LED ((0 << 1) << 4)
#define PI_GPIO_O_LED ((1 << 1) << 4)
#define PI_GPIO_I_RTC_CLK ((0 << 2) << 4)
#define PI_GPIO_O_RTC_CLK ((1 << 2) << 4)
#define PI_GPIO_I_RTC_DAT ((0 << 3) << 4)
#define PI_GPIO_O_RTC_DAT ((1 << 3) << 4)
/* GPIO: Output controls */
/* Power */
#define PI_GPIO_PWR_OFF (0 << 0)
#define PI_GPIO_PWR_ON (1 << 0)
/* LED */
#define PI_GPIO_LED_ON (0 << 1)
#define PI_GPIO_LED_OFF (1 << 1)
/* RTC */
#define PI_GPIO_RTC_CLK_LO (0 << 2)
#define PI_GPIO_RTC_CLK_HI (1 << 2)
#define PI_GPIO_RTC_DAT_LO (0 << 3)
#define PI_GPIO_RTC_DAT_HI (1 << 3)
/* GPIO: Input getters */
#define PI_GPIO_GET_PWR(reg) (((reg) >> 0) & 1)
#define PI_GPIO_GET_LED(reg) (((reg) >> 1) & 1)
#define PI_GPIO_GET_RTC_CLK(reg) (((reg) >> 2) & 1)
#define PI_GPIO_GET_RTC_DAT(reg) (((reg) >> 3) & 1)
/**
* [31] ?
*/
#define PI_64_REG (PI_BASE_REG + 0x64)
/******************************************************************************
* Additional Serial Interface (SI) Registers
*/
/**
* ?
*/
#define SI_0C_REG (SI_BASE_REG + 0x0C)
/**
* ?
*/
#define SI_1C_REG (SI_BASE_REG + 0x1C)
#endif

1
include/ultra64/controller.h
View file

@ -17,6 +17,7 @@
#define CONT_CMD_WRITE_MEMPACK 3
#define CONT_CMD_READ_EEPROM 4
#define CONT_CMD_WRITE_EEPROM 5
#define CONT_CMD_CHANNEL_RESET 0xFD
#define CONT_CMD_RESET 0xFF
#define CONT_CMD_REQUEST_STATUS_TX 1

8
include/ultra64/exception.h
View file

@ -1,7 +1,7 @@
#ifndef ULTRA64_EXCEPTION_H
#define ULTRA64_EXCEPTION_H
// Interrupt masks
/* Interrupt masks */
#define OS_IM_NONE 0x00000001
#define OS_IM_RCP 0x00000401
#define OS_IM_SW1 0x00000501
@ -23,7 +23,7 @@
#define RCP_IMASK 0x003F0000
#define RCP_IMASKSHIFT 16
// OSHWIntr values
/* OSHWIntr values */
#define OS_INTR_CART 1
#ifdef _LANGUAGE_C
@ -51,11 +51,11 @@ extern __osHwInt __osHwIntTable[];
#else
// __osHwInt struct member offsets
/* __osHwInt struct member offsets */
#define HWINT_CALLBACK 0x00
#define HWINT_SP 0x04
// __osHwInt struct size
/* __osHwInt struct size */
#define HWINT_SIZE 0x8
#endif

2
include/ultra64/libc.h
View file

@ -5,7 +5,7 @@
void osSyncPrintf(const char* fmt, ...);
#ifdef __GNUC__
#if defined(__GNUC__) && defined(NON_MATCHING)
void bzero(void* __s, unsigned int __n);
int bcmp(const void* __sl, const void* __s2, unsigned int __n);
void bcopy(const void* __src, void* __dest, unsigned int __n);

12
include/ultra64/message.h
View file

@ -21,6 +21,16 @@
#define OS_EVENT_FAULT 12 /* CPU fault event: used by rmon */
#define OS_EVENT_THREADSTATUS 13 /* CPU thread status: used by rmon */
#define OS_EVENT_PRENMI 14 /* Pre NMI interrupt */
#ifdef BBPLAYER
#define OS_EVENT_FLASH 23 /* NAND flash operation complete */
#define OS_EVENT_AES 24 /* AES decryption complete */
#define OS_EVENT_IDE 25 /* IDE transfer complete */
#define OS_EVENT_PI_ERR 26 /* PI Error? */
#define OS_EVENT_USB0 27 /* USB Controller 0 */
#define OS_EVENT_USB1 28 /* USB Controller 1 */
#define OS_EVENT_UNK_29 29 /* ? */
#define OS_EVENT_MD 30 /* Memory card removed */
#endif
#ifdef _LANGUAGE_C
@ -47,7 +57,7 @@ typedef struct OSMesgQueue {
#else
// OSMesgQueue struct member offsets
/* OSMesgQueue struct member offsets */
#define MQ_MTQUEUE 0x00
#define MQ_FULLQUEUE 0x04

402
include/ultra64/rcp.h
View file

@ -114,13 +114,13 @@
/**
* External device info
*/
#define DEVICE_TYPE_CART 0 // ROM cartridge
#define DEVICE_TYPE_BULK 1 // ROM bulk
#define DEVICE_TYPE_64DD 2 // 64 Disk Drive
#define DEVICE_TYPE_SRAM 3 // SRAM
// 4-6 are reserved
#define DEVICE_TYPE_INIT 7 // initial value
// 8-14 are reserved
#define DEVICE_TYPE_CART 0 /* ROM cartridge */
#define DEVICE_TYPE_BULK 1 /* ROM bulk */
#define DEVICE_TYPE_64DD 2 /* 64 Disk Drive */
#define DEVICE_TYPE_SRAM 3 /* SRAM */
/* 4-6 are reserved */
#define DEVICE_TYPE_INIT 7 /* initial value */
/* 8-14 are reserved */
/**
@ -138,31 +138,31 @@
#define SP_BASE_REG 0x04040000
// SP memory address (R/W): [12] 0=DMEM,1=IMEM, [11:0] DMEM/IMEM address
/* SP memory address (R/W): [12] 0=DMEM,1=IMEM, [11:0] DMEM/IMEM address */
#define SP_MEM_ADDR_REG (SP_BASE_REG + 0x00)
// SP DRAM DMA address (R/W): [23:0] RDRAM address
/* SP DRAM DMA address (R/W): [23:0] RDRAM address */
#define SP_DRAM_ADDR_REG (SP_BASE_REG + 0x04)
// SP read DMA length (R/W): [31:20] skip, [19:12] count, [11:0] length; RDRAM -> I/DMEM
/* SP read DMA length (R/W): [31:20] skip, [19:12] count, [11:0] length; RDRAM -> I/DMEM */
#define SP_RD_LEN_REG (SP_BASE_REG + 0x08)
// SP write DMA length (R/W): [31:20] skip, [19:12] count, [11:0] length; I/DMEM -> RDRAM
/* SP write DMA length (R/W): [31:20] skip, [19:12] count, [11:0] length; I/DMEM -> RDRAM */
#define SP_WR_LEN_REG (SP_BASE_REG + 0x0C)
// SP status (R/W): [14:0] valid bits; see below for write/read mode
/* SP status (R/W): [14:0] valid bits; see below for write/read mode */
#define SP_STATUS_REG (SP_BASE_REG + 0x10)
// SP DMA full (R): [0] dma full
/* SP DMA full (R): [0] dma full */
#define SP_DMA_FULL_REG (SP_BASE_REG + 0x14)
// SP DMA busy (R): [0] dma busy
/* SP DMA busy (R): [0] dma busy */
#define SP_DMA_BUSY_REG (SP_BASE_REG + 0x18)
// SP semaphore (R/W): Read: [0] acquire semaphore; Write: [] release semaphore
/* SP semaphore (R/W): Read: [0] acquire semaphore; Write: [] release semaphore */
#define SP_SEMAPHORE_REG (SP_BASE_REG + 0x1C)
// SP PC (R/W): [11:0] program counter
/* SP PC (R/W): [11:0] program counter */
#define SP_PC_REG 0x04080000
/*
@ -174,31 +174,31 @@
/*
* SP_STATUS_REG: write bits
*/
#define SP_CLR_HALT (1 << 0) // clear halt
#define SP_SET_HALT (1 << 1) // set halt
#define SP_CLR_BROKE (1 << 2) // clear broke
#define SP_CLR_INTR (1 << 3) // clear interrupt
#define SP_SET_INTR (1 << 4) // set interrupt
#define SP_CLR_SSTEP (1 << 5) // clear sstep
#define SP_SET_SSTEP (1 << 6) // set sstep
#define SP_CLR_INTR_BREAK (1 << 7) // clear interrupt on break
#define SP_SET_INTR_BREAK (1 << 8) // set interrupt on break
#define SP_CLR_SIG0 (1 << 9) // clear signal 0
#define SP_SET_SIG0 (1 << 10) // set signal 0
#define SP_CLR_SIG1 (1 << 11) // clear signal 1
#define SP_SET_SIG1 (1 << 12) // set signal 1
#define SP_CLR_SIG2 (1 << 13) // clear signal 2
#define SP_SET_SIG2 (1 << 14) // set signal 2
#define SP_CLR_SIG3 (1 << 15) // clear signal 3
#define SP_SET_SIG3 (1 << 16) // set signal 3
#define SP_CLR_SIG4 (1 << 17) // clear signal 4
#define SP_SET_SIG4 (1 << 18) // set signal 4
#define SP_CLR_SIG5 (1 << 19) // clear signal 5
#define SP_SET_SIG5 (1 << 20) // set signal 5
#define SP_CLR_SIG6 (1 << 21) // clear signal 6
#define SP_SET_SIG6 (1 << 22) // set signal 6
#define SP_CLR_SIG7 (1 << 23) // clear signal 7
#define SP_SET_SIG7 (1 << 24) // set signal 7
#define SP_CLR_HALT (1 << 0) /* clear halt */
#define SP_SET_HALT (1 << 1) /* set halt */
#define SP_CLR_BROKE (1 << 2) /* clear broke */
#define SP_CLR_INTR (1 << 3) /* clear interrupt */
#define SP_SET_INTR (1 << 4) /* set interrupt */
#define SP_CLR_SSTEP (1 << 5) /* clear sstep */
#define SP_SET_SSTEP (1 << 6) /* set sstep */
#define SP_CLR_INTR_BREAK (1 << 7) /* clear interrupt on break */
#define SP_SET_INTR_BREAK (1 << 8) /* set interrupt on break */
#define SP_CLR_SIG0 (1 << 9) /* clear signal 0 */
#define SP_SET_SIG0 (1 << 10) /* set signal 0 */
#define SP_CLR_SIG1 (1 << 11) /* clear signal 1 */
#define SP_SET_SIG1 (1 << 12) /* set signal 1 */
#define SP_CLR_SIG2 (1 << 13) /* clear signal 2 */
#define SP_SET_SIG2 (1 << 14) /* set signal 2 */
#define SP_CLR_SIG3 (1 << 15) /* clear signal 3 */
#define SP_SET_SIG3 (1 << 16) /* set signal 3 */
#define SP_CLR_SIG4 (1 << 17) /* clear signal 4 */
#define SP_SET_SIG4 (1 << 18) /* set signal 4 */
#define SP_CLR_SIG5 (1 << 19) /* clear signal 5 */
#define SP_SET_SIG5 (1 << 20) /* set signal 5 */
#define SP_CLR_SIG6 (1 << 21) /* clear signal 6 */
#define SP_SET_SIG6 (1 << 22) /* set signal 6 */
#define SP_CLR_SIG7 (1 << 23) /* clear signal 7 */
#define SP_SET_SIG7 (1 << 24) /* set signal 7 */
/*
* SP_STATUS_REG: read bits
@ -238,22 +238,22 @@
#define SP_SET_CPUSIGNAL SP_SET_SIG4
#define SP_STATUS_CPUSIGNAL SP_STATUS_SIG4
// SP IMEM BIST REG (R/W): [6:0] BIST status bits; see below for detail
/* SP IMEM BIST REG (R/W): [6:0] BIST status bits; see below for detail */
#define SP_IBIST_REG 0x04080004
/*
* SP_IBIST_REG: write bits
*/
#define SP_IBIST_CHECK (1 << 0) // BIST check
#define SP_IBIST_GO (1 << 1) // BIST go
#define SP_IBIST_CLEAR (1 << 2) // BIST clear
#define SP_IBIST_CHECK (1 << 0) /* BIST check */
#define SP_IBIST_GO (1 << 1) /* BIST go */
#define SP_IBIST_CLEAR (1 << 2) /* BIST clear */
/*
* SP_BIST_REG: read bits
* First 2 bits are same as in write mode
*/
#define SP_IBIST_DONE (1 << 2)
#define SP_IBIST_FAILED 0x78 // bits [6:3], BIST fail
#define SP_IBIST_FAILED 0x78 /* bits [6:3], BIST fail */
/**
@ -261,28 +261,28 @@
*/
#define DPC_BASE_REG 0x04100000
// DP CMD DMA start (R/W): [23:0] DMEM/RDRAM start address
/* DP CMD DMA start (R/W): [23:0] DMEM/RDRAM start address */
#define DPC_START_REG (DPC_BASE_REG + 0x00)
// DP CMD DMA end (R/W): [23:0] DMEM/RDRAM end address
/* DP CMD DMA end (R/W): [23:0] DMEM/RDRAM end address */
#define DPC_END_REG (DPC_BASE_REG + 0x04)
// DP CMD DMA end (R): [23:0] DMEM/RDRAM current address
/* DP CMD DMA end (R): [23:0] DMEM/RDRAM current address */
#define DPC_CURRENT_REG (DPC_BASE_REG + 0x08)
// DP CMD status (R/W): [9:0] valid bits - see below for definitions
/* DP CMD status (R/W): [9:0] valid bits - see below for definitions */
#define DPC_STATUS_REG (DPC_BASE_REG + 0x0C)
// DP clock counter (R): [23:0] clock counter
/* DP clock counter (R): [23:0] clock counter */
#define DPC_CLOCK_REG (DPC_BASE_REG + 0x10)
// DP buffer busy counter (R): [23:0] clock counter
/* DP buffer busy counter (R): [23:0] clock counter */
#define DPC_BUFBUSY_REG (DPC_BASE_REG + 0x14)
// DP pipe busy counter (R): [23:0] clock counter
/* DP pipe busy counter (R): [23:0] clock counter */
#define DPC_PIPEBUSY_REG (DPC_BASE_REG + 0x18)
// DP TMEM load counter (R): [23:0] clock counter
/* DP TMEM load counter (R): [23:0] clock counter */
#define DPC_TMEM_REG (DPC_BASE_REG + 0x1C)
/*
@ -320,16 +320,16 @@
*/
#define DPS_BASE_REG 0x04200000
// DP tmem built-in self-test (R/W): [10:0] BIST status bits
/* DP tmem built-in self-test (R/W): [10:0] BIST status bits */
#define DPS_TBIST_REG (DPS_BASE_REG + 0x00)
// DP span test mode (R/W): [0] Span buffer test access enable
/* DP span test mode (R/W): [0] Span buffer test access enable */
#define DPS_TEST_MODE_REG (DPS_BASE_REG + 0x04)
// DP span buffer test address (R/W): [6:0] bits
/* DP span buffer test address (R/W): [6:0] bits */
#define DPS_BUFTEST_ADDR_REG (DPS_BASE_REG + 0x08)
// DP span buffer test data (R/W): [31:0] span buffer data
/* DP span buffer test data (R/W): [31:0] span buffer data */
#define DPS_BUFTEST_DATA_REG (DPS_BASE_REG + 0x0C)
/*
@ -344,7 +344,7 @@
* First 2 bits are same as in write mode
*/
#define DPS_TBIST_DONE (1 << 2)
#define DPS_TBIST_FAILED 0x7F8 // bits [10:3], BIST fail
#define DPS_TBIST_FAILED 0x7F8 /* bits [10:3], BIST fail */
/**
@ -352,22 +352,22 @@
*/
#define MI_BASE_REG 0x04300000
// MI init mode (W): [11] clear DP interrupt, [9/10] clear/set ebus test mode
// [8] set init mode, [7] clear init mode, [6:0] init length
// (R): [8] ebus test mode, [7] init mode, [6:0] init length
/* MI init mode (W): [11] clear DP interrupt, [9/10] clear/set ebus test mode */
/* [8] set init mode, [7] clear init mode, [6:0] init length */
/* (R): [8] ebus test mode, [7] init mode, [6:0] init length */
#define MI_INIT_MODE_REG (MI_BASE_REG + 0x00)
#define MI_MODE_REG MI_INIT_MODE_REG
/*
* MI_MODE_REG: write bits
*/
#define MI_CLR_INIT (1 << 7) // clear init mode
#define MI_SET_INIT (1 << 8) // set init mode
#define MI_CLR_EBUS (1 << 9) // clear ebus test
#define MI_SET_EBUS (1 << 10) // set ebus test mode
#define MI_CLR_DP_INTR (1 << 11) // clear dp interrupt
#define MI_CLR_RDRAM (1 << 12) // clear RDRAM reg
#define MI_SET_RDRAM (1 << 13) // set RDRAM reg mode
#define MI_CLR_INIT (1 << 7) /* clear init mode */
#define MI_SET_INIT (1 << 8) /* set init mode */
#define MI_CLR_EBUS (1 << 9) /* clear ebus test */
#define MI_SET_EBUS (1 << 10) /* set ebus test mode */
#define MI_CLR_DP_INTR (1 << 11) /* clear dp interrupt */
#define MI_CLR_RDRAM (1 << 12) /* clear RDRAM reg */
#define MI_SET_RDRAM (1 << 13) /* set RDRAM reg mode */
/*
* MI_MODE_REG: read bits
@ -376,52 +376,52 @@
#define MI_MODE_EBUS (1 << 8) /* ebus test mode */
#define MI_MODE_RDRAM (1 << 9) /* RDRAM reg mode */
// MI version (R): [31:24] rsp, [23:16] rdp, [15:8] rac, [7:0] io
/* MI version (R): [31:24] rsp, [23:16] rdp, [15:8] rac, [7:0] io */
#define MI_VERSION_REG (MI_BASE_REG + 0x04)
#define MI_NOOP_REG MI_VERSION_REG
// MI interrupt (R): [5:0] valid bits - see below for bit patterns
/* MI interrupt (R): [5:0] valid bits - see below for bit patterns */
#define MI_INTR_REG (MI_BASE_REG + 0x08)
// MI interrupt mask (R): [5:0] valid bits - see below for bit patterns
// (W): [11:0] valid bits - see below for bit patterns
/* MI interrupt mask (R): [5:0] valid bits - see below for bit patterns */
/* (W): [11:0] valid bits - see below for bit patterns */
#define MI_INTR_MASK_REG (MI_BASE_REG + 0x0C)
/*
* MI_INTR_REG: read bits
*/
#define MI_INTR_SP (1 << 0) // SP intr
#define MI_INTR_SI (1 << 1) // SI intr
#define MI_INTR_AI (1 << 2) // AI intr
#define MI_INTR_VI (1 << 3) // VI intr
#define MI_INTR_PI (1 << 4) // PI intr
#define MI_INTR_DP (1 << 5) // DP intr
#define MI_INTR_SP (1 << 0) /* SP intr */
#define MI_INTR_SI (1 << 1) /* SI intr */
#define MI_INTR_AI (1 << 2) /* AI intr */
#define MI_INTR_VI (1 << 3) /* VI intr */
#define MI_INTR_PI (1 << 4) /* PI intr */
#define MI_INTR_DP (1 << 5) /* DP intr */
/*
* MI_INTR_MASK_REG: write bits
*/
#define MI_INTR_MASK_CLR_SP (1 << 0) // clear SP mask
#define MI_INTR_MASK_SET_SP (1 << 1) // set SP mask
#define MI_INTR_MASK_CLR_SI (1 << 2) // clear SI mask
#define MI_INTR_MASK_SET_SI (1 << 3) // set SI mask
#define MI_INTR_MASK_CLR_AI (1 << 4) // clear AI mask
#define MI_INTR_MASK_SET_AI (1 << 5) // set AI mask
#define MI_INTR_MASK_CLR_VI (1 << 6) // clear VI mask
#define MI_INTR_MASK_SET_VI (1 << 7) // set VI mask
#define MI_INTR_MASK_CLR_PI (1 << 8) // clear PI mask
#define MI_INTR_MASK_SET_PI (1 << 9) // set PI mask
#define MI_INTR_MASK_CLR_DP (1 << 10) // clear DP mask
#define MI_INTR_MASK_SET_DP (1 << 11) // set DP mask
#define MI_INTR_MASK_CLR_SP (1 << 0) /* clear SP mask */
#define MI_INTR_MASK_SET_SP (1 << 1) /* set SP mask */
#define MI_INTR_MASK_CLR_SI (1 << 2) /* clear SI mask */
#define MI_INTR_MASK_SET_SI (1 << 3) /* set SI mask */
#define MI_INTR_MASK_CLR_AI (1 << 4) /* clear AI mask */
#define MI_INTR_MASK_SET_AI (1 << 5) /* set AI mask */
#define MI_INTR_MASK_CLR_VI (1 << 6) /* clear VI mask */
#define MI_INTR_MASK_SET_VI (1 << 7) /* set VI mask */
#define MI_INTR_MASK_CLR_PI (1 << 8) /* clear PI mask */
#define MI_INTR_MASK_SET_PI (1 << 9) /* set PI mask */
#define MI_INTR_MASK_CLR_DP (1 << 10) /* clear DP mask */
#define MI_INTR_MASK_SET_DP (1 << 11) /* set DP mask */
/*
* MI_INTR_MASK_REG: read bits
*/
#define MI_INTR_MASK_SP (1 << 0) // SP intr mask
#define MI_INTR_MASK_SI (1 << 1) // SI intr mask
#define MI_INTR_MASK_AI (1 << 2) // AI intr mask
#define MI_INTR_MASK_VI (1 << 3) // VI intr mask
#define MI_INTR_MASK_PI (1 << 4) // PI intr mask
#define MI_INTR_MASK_DP (1 << 5) // DP intr mask
#define MI_INTR_MASK_SP (1 << 0) /* SP intr mask */
#define MI_INTR_MASK_SI (1 << 1) /* SI intr mask */
#define MI_INTR_MASK_AI (1 << 2) /* AI intr mask */
#define MI_INTR_MASK_VI (1 << 3) /* VI intr mask */
#define MI_INTR_MASK_PI (1 << 4) /* PI intr mask */
#define MI_INTR_MASK_DP (1 << 5) /* DP intr mask */
/**
@ -454,90 +454,90 @@
#define VI_CONTROL_REG (VI_BASE_REG + 0x00)
#define VI_STATUS_REG VI_CONTROL_REG
// VI origin (R/W): [23:0] frame buffer origin in bytes
/* VI origin (R/W): [23:0] frame buffer origin in bytes */
#define VI_ORIGIN_REG (VI_BASE_REG + 0x04)
#define VI_DRAM_ADDR_REG VI_ORIGIN_REG
// VI width (R/W): [11:0] frame buffer line width in pixels
/* VI width (R/W): [11:0] frame buffer line width in pixels */
#define VI_WIDTH_REG (VI_BASE_REG + 0x08)
#define VI_H_WIDTH_REG VI_WIDTH_REG
// VI vertical intr (R/W): [9:0] interrupt when current half-line = V_INTR
/* VI vertical intr (R/W): [9:0] interrupt when current half-line = V_INTR */
#define VI_INTR_REG (VI_BASE_REG + 0x0C)
#define VI_V_INTR_REG VI_INTR_REG
// VI current vertical line (R/W): [9:0] current half line, sampled once per
// line (the lsb of V_CURRENT is constant within a field, and in interlaced
// modes gives the field number - which is constant for non-interlaced modes)
// - Any write to this register will clear interrupt line
/* VI current vertical line (R/W): [9:0] current half line, sampled once per */
/* line (the lsb of V_CURRENT is constant within a field, and in interlaced */
/* modes gives the field number - which is constant for non-interlaced modes) */
/* - Any write to this register will clear interrupt line */
#define VI_CURRENT_REG (VI_BASE_REG + 0x10)
#define VI_V_CURRENT_LINE_REG VI_CURRENT_REG
// VI video timing (R/W): [29:20] start of color burst in pixels from h-sync
// [19:16] vertical sync width in half lines,
// [15: 8] color burst width in pixels,
// [ 7: 0] horizontal sync width in pixels,
/* VI video timing (R/W): [29:20] start of color burst in pixels from h-sync */
/* [19:16] vertical sync width in half lines, */
/* [15: 8] color burst width in pixels, */
/* [ 7: 0] horizontal sync width in pixels, */
#define VI_BURST_REG (VI_BASE_REG + 0x14)
#define VI_TIMING_REG VI_BURST_REG
// VI vertical sync (R/W): [9:0] number of half-lines per field
/* VI vertical sync (R/W): [9:0] number of half-lines per field */
#define VI_V_SYNC_REG (VI_BASE_REG + 0x18)
// VI horizontal sync (R/W): [20:16] a 5-bit leap pattern used for PAL only (h_sync_period)
// [11: 0] total duration of a line in 1/4 pixel
/* VI horizontal sync (R/W): [20:16] a 5-bit leap pattern used for PAL only (h_sync_period) */
/* [11: 0] total duration of a line in 1/4 pixel */
#define VI_H_SYNC_REG (VI_BASE_REG + 0x1C)
// VI horizontal sync leap (R/W): [27:16] identical to h_sync_period
// [11: 0] identical to h_sync_period
/* VI horizontal sync leap (R/W): [27:16] identical to h_sync_period */
/* [11: 0] identical to h_sync_period */
#define VI_LEAP_REG (VI_BASE_REG + 0x20)
#define VI_H_SYNC_LEAP_REG VI_LEAP_REG
// VI horizontal video (R/W): [25:16] start of active video in screen pixels
// [ 9: 0] end of active video in screen pixels
/* VI horizontal video (R/W): [25:16] start of active video in screen pixels */
/* [ 9: 0] end of active video in screen pixels */
#define VI_H_START_REG (VI_BASE_REG + 0x24)
#define VI_H_VIDEO_REG VI_H_START_REG
// VI vertical video (R/W): [25:16] start of active video in screen half-lines
// [ 9: 0] end of active video in screen half-lines
/* VI vertical video (R/W): [25:16] start of active video in screen half-lines */
/* [ 9: 0] end of active video in screen half-lines */
#define VI_V_START_REG (VI_BASE_REG + 0x28)
#define VI_V_VIDEO_REG VI_V_START_REG
// VI vertical burst (R/W): [25:16] start of color burst enable in half-lines
// [ 9: 0] end of color burst enable in half-lines
/* VI vertical burst (R/W): [25:16] start of color burst enable in half-lines */
/* [ 9: 0] end of color burst enable in half-lines */
#define VI_V_BURST_REG (VI_BASE_REG + 0x2C)
// VI x-scale (R/W): [27:16] horizontal subpixel offset (2.10 format)
// [11: 0] 1/horizontal scale up factor (2.10 format)
/* VI x-scale (R/W): [27:16] horizontal subpixel offset (2.10 format) */
/* [11: 0] 1/horizontal scale up factor (2.10 format) */
#define VI_X_SCALE_REG (VI_BASE_REG + 0x30)
// VI y-scale (R/W): [27:16] vertical subpixel offset (2.10 format)
// [11: 0] 1/vertical scale up factor (2.10 format)
/* VI y-scale (R/W): [27:16] vertical subpixel offset (2.10 format) */
/* [11: 0] 1/vertical scale up factor (2.10 format) */
#define VI_Y_SCALE_REG (VI_BASE_REG + 0x34)
/*
* VI_CONTROL_REG: read bits
*/
#define VI_CTRL_TYPE_16 0x00002 // [1:0] pixel size: 16 bit
#define VI_CTRL_TYPE_32 0x00003 // [1:0] pixel size: 32 bit
#define VI_CTRL_GAMMA_DITHER_ON 0x00004 // 2: default = on
#define VI_CTRL_GAMMA_ON 0x00008 // 3: default = on
#define VI_CTRL_DIVOT_ON 0x00010 // 4: default = on
#define VI_CTRL_SERRATE_ON 0x00040 // 6: on if interlaced
#define VI_CTRL_ANTIALIAS_MASK 0x00300 // [9:8] anti-alias mode
#define VI_CTRL_ANTIALIAS_MODE_0 0x00000 // Bit [9:8] anti-alias mode: AA enabled, resampling enabled, always fetch extra lines
#define VI_CTRL_ANTIALIAS_MODE_1 0x00100 // Bit [9:8] anti-alias mode: AA enabled, resampling enabled, fetch extra lines as-needed
#define VI_CTRL_ANTIALIAS_MODE_2 0x00200 // Bit [9:8] anti-alias mode: AA disabled, resampling enabled, operate as if everything is covered
#define VI_CTRL_ANTIALIAS_MODE_3 0x00300 // Bit [9:8] anti-alias mode: AA disabled, resampling disabled, replicate pixels
#define VI_CTRL_PIXEL_ADV_MASK 0x0F000 // [15:12] pixel advance mode
#define VI_CTRL_PIXEL_ADV_3 0x03000 // Bit [15:12] pixel advance mode: Always 3 on N64
#define VI_CTRL_DITHER_FILTER_ON 0x10000 // 16: dither-filter mode
#define VI_CTRL_TYPE_16 0x00002 /* [1:0] pixel size: 16 bit */
#define VI_CTRL_TYPE_32 0x00003 /* [1:0] pixel size: 32 bit */
#define VI_CTRL_GAMMA_DITHER_ON 0x00004 /* 2: default = on */
#define VI_CTRL_GAMMA_ON 0x00008 /* 3: default = on */
#define VI_CTRL_DIVOT_ON 0x00010 /* 4: default = on */
#define VI_CTRL_SERRATE_ON 0x00040 /* 6: on if interlaced */
#define VI_CTRL_ANTIALIAS_MASK 0x00300 /* [9:8] anti-alias mode */
#define VI_CTRL_ANTIALIAS_MODE_0 0x00000 /* Bit [9:8] anti-alias mode: AA enabled, resampling enabled, always fetch extra lines */
#define VI_CTRL_ANTIALIAS_MODE_1 0x00100 /* Bit [9:8] anti-alias mode: AA enabled, resampling enabled, fetch extra lines as-needed */
#define VI_CTRL_ANTIALIAS_MODE_2 0x00200 /* Bit [9:8] anti-alias mode: AA disabled, resampling enabled, operate as if everything is covered */
#define VI_CTRL_ANTIALIAS_MODE_3 0x00300 /* Bit [9:8] anti-alias mode: AA disabled, resampling disabled, replicate pixels */
#define VI_CTRL_PIXEL_ADV_MASK 0x0F000 /* [15:12] pixel advance mode */
#define VI_CTRL_PIXEL_ADV(n) (((n) << 12) & VI_CTRL_PIXEL_ADV_MASK) /* Bit [15:12] pixel advance mode: Always 3 on N64 */
#define VI_CTRL_DITHER_FILTER_ON 0x10000 /* 16: dither-filter mode */
/*
* Possible video clocks (NTSC or PAL)
*/
#define VI_NTSC_CLOCK 48681812 // Hz = 48.681812 MHz
#define VI_PAL_CLOCK 49656530 // Hz = 49.656530 MHz
#define VI_MPAL_CLOCK 48628316 // Hz = 48.628316 MHz
#define VI_NTSC_CLOCK 48681812 /* Hz = 48.681812 MHz */
#define VI_PAL_CLOCK 49656530 /* Hz = 49.656530 MHz */
#define VI_MPAL_CLOCK 48628316 /* Hz = 48.628316 MHz */
/**
@ -549,25 +549,25 @@
*/
#define AI_BASE_REG 0x04500000
// AI DRAM address (W): [23:0] starting RDRAM address (8B-aligned)
/* AI DRAM address (W): [23:0] starting RDRAM address (8B-aligned) */
#define AI_DRAM_ADDR_REG (AI_BASE_REG + 0x00)
// AI length (R/W): [14:0] transfer length (v1.0) - Bottom 3 bits are ignored
// [17:0] transfer length (v2.0) - Bottom 3 bits are ignored
/* AI length (R/W): [14:0] transfer length (v1.0) - Bottom 3 bits are ignored */
/* [17:0] transfer length (v2.0) - Bottom 3 bits are ignored */
#define AI_LEN_REG (AI_BASE_REG + 0x04)
// AI control (W): [0] DMA enable - if LSB == 1, DMA is enabled
/* AI control (W): [0] DMA enable - if LSB == 1, DMA is enabled */
#define AI_CONTROL_REG (AI_BASE_REG + 0x08)
/*
* AI_CONTROL_REG: write bits
*/
#define AI_CONTROL_DMA_ON 1 // LSB = 1: DMA enable
#define AI_CONTROL_DMA_OFF 0 // LSB = 1: DMA enable
#define AI_CONTROL_DMA_ON 1 /* LSB = 1: DMA enable */
#define AI_CONTROL_DMA_OFF 0 /* LSB = 1: DMA enable */
// AI status (R): [31]/[0] ai_full (addr & len buffer full), [30] ai_busy
// Note that a 1->0 transition in ai_full will set interrupt
// (W): clear audio interrupt
/* AI status (R): [31]/[0] ai_full (addr & len buffer full), [30] ai_busy */
/* Note that a 1->0 transition in ai_full will set interrupt */
/* (W): clear audio interrupt */
#define AI_STATUS_REG (AI_BASE_REG + 0x0C)
/*
@ -576,23 +576,23 @@
#define AI_STATUS_FIFO_FULL (1 << 31)
#define AI_STATUS_DMA_BUSY (1 << 30)
// AI DAC sample period register (W): [13:0] dac rate
// - vid_clock/(dperiod + 1) is the DAC sample rate
// - (dperiod + 1) >= 66 * (aclockhp + 1) must be true
/* AI DAC sample period register (W): [13:0] dac rate */
/* - vid_clock/(dperiod + 1) is the DAC sample rate */
/* - (dperiod + 1) >= 66 * (aclockhp + 1) must be true */
#define AI_DACRATE_REG (AI_BASE_REG + 0x10)
// DAC rate = video clock / audio frequency
// - DAC rate >= (66 * Bit rate) must be true
#define AI_MAX_DAC_RATE 16384 // 14-bit+1
/* DAC rate = video clock / audio frequency */
/* - DAC rate >= (66 * Bit rate) must be true */
#define AI_MAX_DAC_RATE 16384 /* 14-bit+1 */
#define AI_MIN_DAC_RATE 132
// AI bit rate (W): [3:0] bit rate (abus clock half period register - aclockhp)
// - vid_clock/(2 * (aclockhp + 1)) is the DAC clock rate
// - The abus clock stops if aclockhp is zero
/* AI bit rate (W): [3:0] bit rate (abus clock half period register - aclockhp) */
/* - vid_clock/(2 * (aclockhp + 1)) is the DAC clock rate */
/* - The abus clock stops if aclockhp is zero */
#define AI_BITRATE_REG (AI_BASE_REG + 0x14)
// Bit rate <= (DAC rate / 66)
#define AI_MAX_BIT_RATE 16 // 4-bit+1
/* Bit rate <= (DAC rate / 66) */
#define AI_MAX_BIT_RATE 16 /* 4-bit+1 */
#define AI_MIN_BIT_RATE 2
/*
@ -600,14 +600,14 @@
* max frequency = (video clock / min dac rate)
* min frequency = (video clock / max dac rate)
*/
#define AI_NTSC_MAX_FREQ 368000 // 368 KHz
#define AI_NTSC_MIN_FREQ 3000 // 3 KHz ~ 2971 Hz
#define AI_NTSC_MAX_FREQ 368000 /* 368 KHz */
#define AI_NTSC_MIN_FREQ 3000 /* 3 KHz ~ 2971 Hz */
#define AI_PAL_MAX_FREQ 376000 // 376 KHz
#define AI_PAL_MIN_FREQ 3050 // 3 KHz ~ 3031 Hz
#define AI_PAL_MAX_FREQ 376000 /* 376 KHz */
#define AI_PAL_MIN_FREQ 3050 /* 3 KHz ~ 3031 Hz */
#define AI_MPAL_MAX_FREQ 368000 // 368 KHz
#define AI_MPAL_MIN_FREQ 3000 // 3 KHz ~ 2968 Hz
#define AI_MPAL_MAX_FREQ 368000 /* 368 KHz */
#define AI_MPAL_MIN_FREQ 3000 /* 3 KHz ~ 2968 Hz */
/**
@ -615,44 +615,44 @@
*/
#define PI_BASE_REG 0x04600000
// PI DRAM address (R/W): [23:0] starting RDRAM address
/* PI DRAM address (R/W): [23:0] starting RDRAM address */
#define PI_DRAM_ADDR_REG (PI_BASE_REG + 0x00)
// PI pbus (cartridge) address (R/W): [31:0] starting AD16 address
/* PI pbus (cartridge) address (R/W): [31:0] starting AD16 address */
#define PI_CART_ADDR_REG (PI_BASE_REG + 0x04)
// PI read length (R/W): [23:0] read data length
/* PI read length (R/W): [23:0] read data length */
#define PI_RD_LEN_REG (PI_BASE_REG + 0x08)
// PI write length (R/W): [23:0] write data length
/* PI write length (R/W): [23:0] write data length */
#define PI_WR_LEN_REG (PI_BASE_REG + 0x0C)
// PI status (R): [3] interrupt flag, [2] error, [1] IO busy, [0] DMA busy
// (W): [1] clear intr, [0] reset controller (and abort current op)
/* PI status (R): [3] interrupt flag, [2] error, [1] IO busy, [0] DMA busy */
/* (W): [1] clear intr, [0] reset controller (and abort current op) */
#define PI_STATUS_REG (PI_BASE_REG + 0x10)
// PI dom1 latency (R/W): [7:0] domain 1 device latency
/* PI dom1 latency (R/W): [7:0] domain 1 device latency */
#define PI_BSD_DOM1_LAT_REG (PI_BASE_REG + 0x14)
// PI dom1 pulse width (R/W): [7:0] domain 1 device R/W strobe pulse width
/* PI dom1 pulse width (R/W): [7:0] domain 1 device R/W strobe pulse width */
#define PI_BSD_DOM1_PWD_REG (PI_BASE_REG + 0x18)
// PI dom1 page size (R/W): [3:0] domain 1 device page size
/* PI dom1 page size (R/W): [3:0] domain 1 device page size */
#define PI_BSD_DOM1_PGS_REG (PI_BASE_REG + 0x1C)
// PI dom1 release (R/W): [1:0] domain 1 device R/W release duration
/* PI dom1 release (R/W): [1:0] domain 1 device R/W release duration */
#define PI_BSD_DOM1_RLS_REG (PI_BASE_REG + 0x20)
// PI dom2 latency (R/W): [7:0] domain 2 device latency
/* PI dom2 latency (R/W): [7:0] domain 2 device latency */
#define PI_BSD_DOM2_LAT_REG (PI_BASE_REG + 0x24)
// PI dom2 pulse width (R/W): [7:0] domain 2 device R/W strobe pulse width
/* PI dom2 pulse width (R/W): [7:0] domain 2 device R/W strobe pulse width */
#define PI_BSD_DOM2_PWD_REG (PI_BASE_REG + 0x28)
// PI dom2 page size (R/W): [3:0] domain 2 device page size
/* PI dom2 page size (R/W): [3:0] domain 2 device page size */
#define PI_BSD_DOM2_PGS_REG (PI_BASE_REG + 0x2C)
// PI dom2 release (R/W): [1:0] domain 2 device R/W release duration
/* PI dom2 release (R/W): [1:0] domain 2 device R/W release duration */
#define PI_BSD_DOM2_RLS_REG (PI_BASE_REG + 0x30)
#define PI_DOMAIN1_REG PI_BSD_DOM1_LAT_REG
@ -719,30 +719,30 @@
*/
#define RI_BASE_REG 0x04700000
// RI mode (R/W): [3] stop R active, [2] stop T active, [1:0] operating mode
/* RI mode (R/W): [3] stop R active, [2] stop T active, [1:0] operating mode */
#define RI_MODE_REG (RI_BASE_REG + 0x00)
// RI config (R/W): [6] current control enable, [5:0] current control input
/* RI config (R/W): [6] current control enable, [5:0] current control input */
#define RI_CONFIG_REG (RI_BASE_REG + 0x04)
// RI current load (W): [] any write updates current control register
/* RI current load (W): [] any write updates current control register */
#define RI_CURRENT_LOAD_REG (RI_BASE_REG + 0x08)
// RI select (R/W): [3:2] receive select, [1:0] transmit select
/* RI select (R/W): [3:2] receive select, [1:0] transmit select */
#define RI_SELECT_REG (RI_BASE_REG + 0x0C)
// RI refresh (R/W): [16] refresh bank, [17] refresh enable, [18] refresh optimize
// [7:0] clean refresh delay, [15:8] dirty refresh dela
/* RI refresh (R/W): [16] refresh bank, [17] refresh enable, [18] refresh optimize */
/* [7:0] clean refresh delay, [15:8] dirty refresh dela */
#define RI_REFRESH_REG (RI_BASE_REG + 0x10)
#define RI_COUNT_REG RI_REFRESH_REG
// RI latency (R/W): [3:0] DMA latency/overlap
/* RI latency (R/W): [3:0] DMA latency/overlap */
#define RI_LATENCY_REG (RI_BASE_REG + 0x14)
// RI error (R): [1] ack error, [0] nack error
/* RI error (R): [1] ack error, [0] nack error */
#define RI_RERROR_REG (RI_BASE_REG + 0x18)
// RI error (W): [] any write clears all error bits
/* RI error (W): [] any write clears all error bits */
#define RI_WERROR_REG (RI_BASE_REG + 0x1C)
@ -751,27 +751,27 @@
*/
#define SI_BASE_REG 0x04800000
// SI DRAM address (R/W): [23:0] starting RDRAM address
/* SI DRAM address (R/W): [23:0] starting RDRAM address */
#define SI_DRAM_ADDR_REG (SI_BASE_REG + 0x00)
// SI address read 64B (W): [] write begins a 64B DMA write PIF RAM -> RDRAM
/* SI address read 64B (W): [] write begins a 64B DMA write PIF RAM -> RDRAM */
#define SI_PIF_ADDR_RD64B_REG (SI_BASE_REG + 0x04)
// Address SI_BASE_REG + (0x08, 0x0C, 0x14) are reserved
/* Address SI_BASE_REG + (0x08, 0x0C, 0x14) are reserved */
// SI address write 64B (W): [] write begins a 64B DMA read RDRAM -> PIF RAM */
/* SI address write 64B (W): [] write begins a 64B DMA read RDRAM -> PIF RAM */
#define SI_PIF_ADDR_WR64B_REG (SI_BASE_REG + 0x10)
// SI status (R/W): [] any write clears interrupt
/* SI status (R/W): [] any write clears interrupt */
#define SI_STATUS_REG (SI_BASE_REG + 0x18)
/*
* SI_STATUS_REG: read bits
*/
#define SI_STATUS_DMA_BUSY (1 << 0) // DMA in progress
#define SI_STATUS_RD_BUSY (1 << 1) // IO access in progress
#define SI_STATUS_DMA_ERROR (1 << 3) // Overlapping DMA requests
#define SI_STATUS_INTERRUPT (1 << 12) // Interrupt is set
#define SI_STATUS_DMA_BUSY (1 << 0) /* DMA in progress */
#define SI_STATUS_RD_BUSY (1 << 1) /* IO access in progress */
#define SI_STATUS_DMA_ERROR (1 << 3) /* Overlapping DMA requests */
#define SI_STATUS_INTERRUPT (1 << 12) /* Interrupt is set */
/**
@ -780,13 +780,13 @@
#define GIO_BASE_REG 0x18000000
// Game to Host Interrupt
/* Game to Host Interrupt */
#define GIO_GIO_INTR_REG (GIO_BASE_REG+0x000)
// Game to Host SYNC
/* Game to Host SYNC */
#define GIO_GIO_SYNC_REG (GIO_BASE_REG+0x400)
// Host to Game Interrupt
/* Host to Game Interrupt */
#define GIO_CART_INTR_REG (GIO_BASE_REG+0x800)

164
include/ultra64/regdef.h Normal file
View file

@ -0,0 +1,164 @@
#ifndef REGDEF_H
#define REGDEF_H
#ifdef __GNUC__
#define _MIPS_SIM_ABI32 _ABIO32
#define _MIPS_SIM_NABI32 _ABIN32
#define _MIPS_SIM_ABI64 _ABI64
#endif
#if (_MIPS_SIM == _MIPS_SIM_ABI32)
#define zero $0
#define AT $at
#define v0 $2
#define v1 $3
#define a0 $4
#define a1 $5
#define a2 $6
#define a3 $7
#define t0 $8
#define t1 $9
#define t2 $10
#define t3 $11
#define t4 $12
#define ta0 $12
#define t5 $13
#define ta1 $13
#define t6 $14
#define ta2 $14
#define t7 $15
#define ta3 $15
#define s0 $16
#define s1 $17
#define s2 $18
#define s3 $19
#define s4 $20
#define s5 $21
#define s6 $22
#define s7 $23
#define t8 $24
#define t9 $25
#define jp $25
#define k0 $26
#define k1 $27
#define gp $28
#define sp $29
#define fp $30
#define s8 $30
#define ra $31
#endif
#if (_MIPS_SIM == _MIPS_SIM_ABI64)
#define zero $0
#define AT $at
#define v0 $2
#define v1 $3
#define a0 $4
#define a1 $5
#define a2 $6
#define a3 $7
#define a4 $8
#define ta0 $8
#define a5 $9
#define ta1 $9
#define a6 $10
#define ta2 $10
#define a7 $11
#define ta3 $11
#define t0 $12
#define t1 $13
#define t2 $14
#define t3 $15
#define s0 $16
#define s1 $17
#define s2 $18
#define s3 $19
#define s4 $20
#define s5 $21
#define s6 $22
#define s7 $23
#define t8 $24
#define t9 $25
#define jp $25
#define k0 $26
#define k1 $27
#define gp $28
#define sp $29
#define fp $30
#define s8 $30
#define ra $31
#endif
#if (_MIPS_SIM == _MIPS_SIM_ABI32)
#define fv0 $f0
#define fv0f $f1
#define fv1 $f2
#define fv1f $f3
#define fa0 $f12
#define fa0f $f13
#define fa1 $f14
#define fa1f $f15
#define ft0 $f4
#define ft0f $f5
#define ft1 $f6
#define ft1f $f7
#define ft2 $f8
#define ft2f $f9
#define ft3 $f10
#define ft3f $f11
#define ft4 $f16
#define ft4f $f17
#define ft5 $f18
#define ft5f $f19
#define fs0 $f20
#define fs0f $f21
#define fs1 $f22
#define fs1f $f23
#define fs2 $f24
#define fs2f $f25
#define fs3 $f26
#define fs3f $f27
#define fs4 $f28
#define fs4f $f29
#define fs5 $f30
#define fs5f $f31
#endif
#if (_MIPS_SIM == _MIPS_SIM_ABI64)
#define fv0 $f0
#define fv1 $f2
#define fa0 $f12
#define fa1 $f13
#define fa2 $f14
#define fa3 $f15
#define fa4 $f16
#define fa5 $f17
#define fa6 $f18
#define fa7 $f19
#define ft0 $f4
#define ft1 $f5
#define ft2 $f6
#define ft3 $f7
#define ft4 $f8
#define ft5 $f9
#define ft6 $f10
#define ft7 $f11
#define ft8 $f20
#define ft9 $f21
#define ft10 $f22
#define ft11 $f23
#define ft12 $f1
#define ft13 $f3
#define fs0 $f24
#define fs1 $f25
#define fs2 $f26
#define fs3 $f27
#define fs4 $f28
#define fs5 $f29
#define fs6 $f30
#define fs7 $f31
#endif
#define fcr31 $31
#endif

2
include/ultra64/thread.h
View file

@ -73,7 +73,7 @@ typedef struct __OSThreadTail {
#else
// OSThread struct member offsets
/* OSThread struct member offsets */
#define THREAD_NEXT 0x00
#define THREAD_PRI 0x04

7
include/ultra64/viint.h
View file

@ -35,5 +35,12 @@
#define ORIGIN(v) (v)
#define VINTR(v) (v)
#define HSTART(start, end) START(start, end)
#define VSTART(start, end) START(start, end)
#ifdef BBPLAYER
#define VI_CTRL_PIXEL_ADV_DEFAULT VI_CTRL_PIXEL_ADV(1)
#else
#define VI_CTRL_PIXEL_ADV_DEFAULT VI_CTRL_PIXEL_ADV(3)
#endif
#endif

17
include/variables.h
View file

@ -9,11 +9,24 @@ extern Mtx D_01000000;
extern void* osRomBase;
extern s32 osTvType;
extern u32 osRomType;
extern u32 osVersion;
extern s32 osResetType;
extern s32 osCicId;
extern u32 osMemSize;
extern u8 osAppNMIBuffer[0x40];
extern u32 __osBbIsBb;
extern u32 __osBbEepromSize;
extern u32 __osBbPakSize;
extern u32 __osBbFlashSize;
extern u32 __osBbEepromAddress;
extern u32 __osBbPakAddress[4];
extern u32 __osBbFlashAddress;
extern u32 __osBbSramSize;
extern u32 __osBbSramAddress;
extern u32 __osBbHackFlags;
extern s8 D_80009430;
extern vu8 gViConfigBlack;
extern u8 gViConfigAdditionalScanLines;
@ -133,8 +146,8 @@ extern s32 gSystemArenaLogSeverity;
extern u8 __osPfsInodeCacheBank;
extern s32 __osPfsLastChannel;
extern const TempoData gTempoData;
extern const AudioHeapInitSizes gAudioHeapInitSizes;
extern TempoData gTempoData;
extern AudioHeapInitSizes gAudioHeapInitSizes;
extern s16 gOcarinaSongItemMap[];
extern AudioTable gSoundFontTable;
extern u8 gSequenceFontTable[];

1
include/versions.h
View file

@ -15,6 +15,7 @@
#define GC_EU 11
#define GC_EU_MQ 12
#define GC_JP_CE 13
#define IQUE_CN 14
// NTSC/PAL
#if OOT_VERSION == PAL_1_0 || OOT_VERSION == PAL_1_1 || OOT_VERSION == GC_EU || OOT_VERSION == GC_EU_MQ || OOT_VERSION == GC_EU_MQ_DBG

4
include/z64audio.h
View file

@ -201,11 +201,9 @@ typedef struct AdpcmBookHeader {
* The procedure used to design the codeBook is based on an adaptive clustering algorithm.
* The size of the codeBook is (8 * order * numPredictors) and is 8-byte aligned
*/
typedef s16 AdpcmBookData[];
typedef struct AdpcmBook {
/* 0x00 */ AdpcmBookHeader header;
/* 0x08 */ AdpcmBookData book; // size 8 * order * numPredictors. 8-byte aligned
/* 0x08 */ s16 book[1]; // size 8 * order * numPredictors. 8-byte aligned
} AdpcmBook; // size >= 0x8
typedef struct Sample {

240
include/z64save.h
View file

@ -465,6 +465,17 @@ typedef enum LinkAge {
* SaveContext.eventChkInf
*/
#define EVENTCHKINF_INDEX(flag) ((flag) >> 4)
#define EVENTCHKINF_MASK(flag) (1 << ((flag) & 0xF))
#define GET_EVENTCHKINF(flag) (gSaveContext.save.info.eventChkInf[EVENTCHKINF_INDEX(flag)] & EVENTCHKINF_MASK(flag))
#define SET_EVENTCHKINF(flag) (gSaveContext.save.info.eventChkInf[EVENTCHKINF_INDEX(flag)] |= EVENTCHKINF_MASK(flag))
#define CLEAR_EVENTCHKINF(flag) (gSaveContext.save.info.eventChkInf[EVENTCHKINF_INDEX(flag)] &= ~EVENTCHKINF_MASK(flag))
// EVENTCHKINF 0x00-0x0F
#define EVENTCHKINF_INDEX_0 0
#define EVENTCHKINF_00_UNUSED 0x00 // flag is set in the debug save, but has no functionality
#define EVENTCHKINF_01_UNUSED 0x01 // flag is set in the debug save, but has no functionality
#define EVENTCHKINF_MIDO_DENIED_DEKU_TREE_ACCESS 0x02
#define EVENTCHKINF_03 0x03
#define EVENTCHKINF_04 0x04
@ -508,11 +519,9 @@ typedef enum LinkAge {
#define EVENTCHKINF_3B 0x3B
#define EVENTCHKINF_DEFEATED_NABOORU_KNUCKLE 0x3C
// 0x40
#define EVENTCHKINF_40_INDEX 4
#define EVENTCHKINF_40_SHIFT 0
#define EVENTCHKINF_40_MASK (1 << EVENTCHKINF_40_SHIFT)
#define EVENTCHKINF_40 ((EVENTCHKINF_40_INDEX << 4) | EVENTCHKINF_40_SHIFT)
// EVENTCHKINF 0x40
#define EVENTCHKINF_INDEX_40 EVENTCHKINF_INDEX(EVENTCHKINF_40)
#define EVENTCHKINF_40 0x40
#define EVENTCHKINF_41 0x41
#define EVENTCHKINF_42 0x42
@ -541,11 +550,9 @@ typedef enum LinkAge {
#define EVENTCHKINF_RESTORED_LAKE_HYLIA 0x69
#define EVENTCHKINF_TALON_WOKEN_IN_KAKARIKO 0x6A
// 0x6B
#define EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO_INDEX 6
#define EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO_SHIFT 11
#define EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO_MASK (1 << EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO_SHIFT)
#define EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO ((EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO_INDEX << 4) | EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO_SHIFT)
// EVENTCHKINF 0x6B
#define EVENTCHKINF_INDEX_TALON_RETURNED_FROM_KAKARIKO EVENTCHKINF_INDEX(EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO)
#define EVENTCHKINF_TALON_RETURNED_FROM_KAKARIKO 0x6B
#define EVENTCHKINF_6E 0x6E
#define EVENTCHKINF_6F 0x6F
@ -565,19 +572,39 @@ typedef enum LinkAge {
#define EVENTCHKINF_PAID_BACK_SPOOKY_MASK 0x8E
#define EVENTCHKINF_PAID_BACK_BUNNY_HOOD 0x8F
// 0x90-0x93
// carpenters freed from the gerudo
#define EVENTCHKINF_CARPENTERS_FREE_INDEX 9
#define EVENTCHKINF_CARPENTERS_FREE_SHIFT(n) (0 + (n))
#define EVENTCHKINF_CARPENTERS_FREE_MASK(n) (1 << EVENTCHKINF_CARPENTERS_FREE_SHIFT(n))
#define EVENTCHKINF_CARPENTERS_FREE(n) ((EVENTCHKINF_CARPENTERS_FREE_INDEX << 4) | EVENTCHKINF_CARPENTERS_FREE_SHIFT(n))
#define EVENTCHKINF_CARPENTERS_FREE_MASK_ALL (\
EVENTCHKINF_CARPENTERS_FREE_MASK(0) \
| EVENTCHKINF_CARPENTERS_FREE_MASK(1) \
| EVENTCHKINF_CARPENTERS_FREE_MASK(2) \
| EVENTCHKINF_CARPENTERS_FREE_MASK(3) )
#define GET_EVENTCHKINF_CARPENTERS_FREE_ALL() \
CHECK_FLAG_ALL(gSaveContext.save.info.eventChkInf[EVENTCHKINF_CARPENTERS_FREE_INDEX], EVENTCHKINF_CARPENTERS_FREE_MASK_ALL)
// EVENTCHKINF 0x90-0x93
// Carpenters rescued from Gerudo Fortress
#define EVENTCHKINF_INDEX_CARPENTERS_RESCUED 0x9
#define EVENTCHKINF_CARPENTER_0_RESCUED 0x90
#define EVENTCHKINF_CARPENTER_1_RESCUED 0x91
#define EVENTCHKINF_CARPENTER_2_RESCUED 0x92
#define EVENTCHKINF_CARPENTER_3_RESCUED 0x93
#define EVENTCHKINF_CARPENTERS_ALL_RESCUED_MASK \
(EVENTCHKINF_MASK(EVENTCHKINF_CARPENTER_0_RESCUED) | EVENTCHKINF_MASK(EVENTCHKINF_CARPENTER_1_RESCUED) | \
EVENTCHKINF_MASK(EVENTCHKINF_CARPENTER_2_RESCUED) | EVENTCHKINF_MASK(EVENTCHKINF_CARPENTER_3_RESCUED))
#define GET_EVENTCHKINF_CARPENTERS_ALL_RESCUED() \
CHECK_FLAG_ALL(gSaveContext.save.info.eventChkInf[EVENTCHKINF_INDEX_CARPENTERS_RESCUED], \
EVENTCHKINF_CARPENTERS_ALL_RESCUED_MASK)
#define GET_EVENTCHKINF_CARPENTERS_ALL_RESCUED2() \
CHECK_FLAG_ALL(gSaveContext.save.info.eventChkInf[EVENTCHKINF_INDEX_CARPENTERS_RESCUED] & \
(EVENTCHKINF_CARPENTERS_ALL_RESCUED_MASK | 0xF0), \
EVENTCHKINF_CARPENTERS_ALL_RESCUED_MASK)
#define ENDAIKU_CARPENTER_RESCUED_MASK(carpenterType) (1 << (carpenterType))
#define ENDAIKU_IS_CARPENTER_RESCUED(carpenterType) \
gSaveContext.save.info.eventChkInf[EVENTCHKINF_INDEX_CARPENTERS_RESCUED] & \
ENDAIKU_CARPENTER_RESCUED_MASK(carpenterType)
#define ENDAIKU_SET_CARPENTER_RESCUED(carpenterType) \
gSaveContext.save.info.eventChkInf[EVENTCHKINF_INDEX_CARPENTERS_RESCUED] |= \
ENDAIKU_CARPENTER_RESCUED_MASK((carpenterType))
#define GET_EVENTCHKINF_CARPENTERS_RESCUED_FLAGS() \
gSaveContext.save.info.eventChkInf[EVENTCHKINF_INDEX_CARPENTERS_RESCUED] & EVENTCHKINF_CARPENTERS_ALL_RESCUED_MASK
#define EVENTCHKINF_94 0x94
#define EVENTCHKINF_95 0x95
@ -621,48 +648,35 @@ typedef enum LinkAge {
#define EVENTCHKINF_C8 0xC8
#define EVENTCHKINF_C9 0xC9
// 0xD0-0xD6
#define EVENTCHKINF_SONGS_FOR_FROGS_INDEX 13
#define EVENTCHKINF_SONGS_FOR_FROGS_CHOIR_SHIFT 0
#define EVENTCHKINF_SONGS_FOR_FROGS_ZL_SHIFT 1
#define EVENTCHKINF_SONGS_FOR_FROGS_EPONA_SHIFT 2
#define EVENTCHKINF_SONGS_FOR_FROGS_SUNS_SHIFT 3
#define EVENTCHKINF_SONGS_FOR_FROGS_SARIA_SHIFT 4
#define EVENTCHKINF_SONGS_FOR_FROGS_SOT_SHIFT 5
#define EVENTCHKINF_SONGS_FOR_FROGS_STORMS_SHIFT 6
#define EVENTCHKINF_SONGS_FOR_FROGS_CHOIR_MASK (1 << EVENTCHKINF_SONGS_FOR_FROGS_CHOIR_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_ZL_MASK (1 << EVENTCHKINF_SONGS_FOR_FROGS_ZL_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_EPONA_MASK (1 << EVENTCHKINF_SONGS_FOR_FROGS_EPONA_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_SUNS_MASK (1 << EVENTCHKINF_SONGS_FOR_FROGS_SUNS_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_SARIA_MASK (1 << EVENTCHKINF_SONGS_FOR_FROGS_SARIA_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_SOT_MASK (1 << EVENTCHKINF_SONGS_FOR_FROGS_SOT_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_STORMS_MASK (1 << EVENTCHKINF_SONGS_FOR_FROGS_STORMS_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_CHOIR ((EVENTCHKINF_SONGS_FOR_FROGS_INDEX << 4) | EVENTCHKINF_SONGS_FOR_FROGS_CHOIR_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_ZL ((EVENTCHKINF_SONGS_FOR_FROGS_INDEX << 4) | EVENTCHKINF_SONGS_FOR_FROGS_ZL_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_EPONA ((EVENTCHKINF_SONGS_FOR_FROGS_INDEX << 4) | EVENTCHKINF_SONGS_FOR_FROGS_EPONA_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_SUNS ((EVENTCHKINF_SONGS_FOR_FROGS_INDEX << 4) | EVENTCHKINF_SONGS_FOR_FROGS_SUNS_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_SARIA ((EVENTCHKINF_SONGS_FOR_FROGS_INDEX << 4) | EVENTCHKINF_SONGS_FOR_FROGS_SARIA_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_SOT ((EVENTCHKINF_SONGS_FOR_FROGS_INDEX << 4) | EVENTCHKINF_SONGS_FOR_FROGS_SOT_SHIFT)
#define EVENTCHKINF_SONGS_FOR_FROGS_STORMS ((EVENTCHKINF_SONGS_FOR_FROGS_INDEX << 4) | EVENTCHKINF_SONGS_FOR_FROGS_STORMS_SHIFT)
// EVENTCHKINF 0xD0-0xD6
#define EVENTCHKINF_INDEX_SONGS_FOR_FROGS EVENTCHKINF_INDEX(EVENTCHKINF_SONGS_FOR_FROGS_CHOIR)
#define EVENTCHKINF_SONGS_FOR_FROGS_CHOIR 0xD0
#define EVENTCHKINF_SONGS_FOR_FROGS_ZL 0xD1
#define EVENTCHKINF_SONGS_FOR_FROGS_EPONA 0xD2
#define EVENTCHKINF_SONGS_FOR_FROGS_SUNS 0xD3
#define EVENTCHKINF_SONGS_FOR_FROGS_SARIA 0xD4
#define EVENTCHKINF_SONGS_FOR_FROGS_SOT 0xD5
#define EVENTCHKINF_SONGS_FOR_FROGS_STORMS 0xD6
// 0xDA-0xDE
#define EVENTCHKINF_DA_DB_DC_DD_DE_INDEX 13
#define EVENTCHKINF_DA_MASK (1 << 10)
#define EVENTCHKINF_DB_MASK (1 << 11)
#define EVENTCHKINF_DC_MASK (1 << 12)
#define EVENTCHKINF_DD_MASK (1 << 13)
#define EVENTCHKINF_DE_MASK (1 << 14)
#define GET_EVENTCHKINF(flag) (gSaveContext.save.info.eventChkInf[(flag) >> 4] & (1 << ((flag) & 0xF)))
#define SET_EVENTCHKINF(flag) (gSaveContext.save.info.eventChkInf[(flag) >> 4] |= (1 << ((flag) & 0xF)))
#define CLEAR_EVENTCHKINF(flag) (gSaveContext.save.info.eventChkInf[(flag) >> 4] &= ~(1 << ((flag) & 0xF)))
// EVENTCHKINF 0xDA-0xDE
#define EVENTCHKINF_INDEX_SKULLTULA_REWARD 0xD
#define EVENTCHKINF_SKULLTULA_REWARD_10 0xDA
#define EVENTCHKINF_SKULLTULA_REWARD_20 0xDB
#define EVENTCHKINF_SKULLTULA_REWARD_30 0xDC
#define EVENTCHKINF_SKULLTULA_REWARD_40 0xDD
#define EVENTCHKINF_SKULLTULA_REWARD_50 0xDE
/*
* SaveContext.itemGetInf
*/
#define ITEMGETINF_INDEX(flag) ((flag) >> 4)
#define ITEMGETINF_MASK(flag) (1 << ((flag) & 0xF))
#define GET_ITEMGETINF(flag) (gSaveContext.save.info.itemGetInf[ITEMGETINF_INDEX(flag)] & ITEMGETINF_MASK(flag))
#define SET_ITEMGETINF(flag) (gSaveContext.save.info.itemGetInf[ITEMGETINF_INDEX(flag)] |= ITEMGETINF_MASK(flag))
#define ITEMGETINF_TALON_BOTTLE 0x02
#define ITEMGETINF_03 0x03
#define ITEMGETINF_04 0x04
@ -685,17 +699,11 @@ typedef enum LinkAge {
#define ITEMGETINF_16 0x16
#define ITEMGETINF_17 0x17
// 0x18-0x1A
#define ITEMGETINF_18_19_1A_INDEX 1
#define ITEMGETINF_18_SHIFT 8
#define ITEMGETINF_19_SHIFT 9
#define ITEMGETINF_1A_SHIFT 10
#define ITEMGETINF_18_MASK (1 << ITEMGETINF_18_SHIFT)
#define ITEMGETINF_19_MASK (1 << ITEMGETINF_19_SHIFT)
#define ITEMGETINF_1A_MASK (1 << ITEMGETINF_1A_SHIFT)
#define ITEMGETINF_18 ((ITEMGETINF_18_19_1A_INDEX << 4) | ITEMGETINF_18_SHIFT)
#define ITEMGETINF_19 ((ITEMGETINF_18_19_1A_INDEX << 4) | ITEMGETINF_19_SHIFT)
#define ITEMGETINF_1A ((ITEMGETINF_18_19_1A_INDEX << 4) | ITEMGETINF_1A_SHIFT)
// ITEMGETINF 0x18-0x1A
#define ITEMGETINF_INDEX_18_19_1A 1
#define ITEMGETINF_18 0x18
#define ITEMGETINF_19 0x19
#define ITEMGETINF_1A 0x1A
#define ITEMGETINF_1B 0x1B
#define ITEMGETINF_1C 0x1C
@ -721,14 +729,19 @@ typedef enum LinkAge {
#define ITEMGETINF_3F 0x3F
#define GET_ITEMGETINF(flag) (gSaveContext.save.info.itemGetInf[(flag) >> 4] & (1 << ((flag) & 0xF)))
#define SET_ITEMGETINF(flag) (gSaveContext.save.info.itemGetInf[(flag) >> 4] |= (1 << ((flag) & 0xF)))
/*
* SaveContext.infTable
*/
#define INFTABLE_INDEX(flag) ((flag) >> 4)
#define INFTABLE_MASK(flag) (1 << ((flag) & 0xF))
#define GET_INFTABLE(flag) (gSaveContext.save.info.infTable[INFTABLE_INDEX(flag)] & INFTABLE_MASK(flag))
#define SET_INFTABLE(flag) (gSaveContext.save.info.infTable[INFTABLE_INDEX(flag)] |= INFTABLE_MASK(flag))
#define CLEAR_INFTABLE(flag) (gSaveContext.save.info.infTable[INFTABLE_INDEX(flag)] &= ~INFTABLE_MASK(flag))
// INFTABLE 0x0-0xF
#define INFTABLE_INDEX_0 0
#define INFTABLE_00 0x00
#define INFTABLE_01 0x01
#define INFTABLE_03 0x03
@ -856,18 +869,18 @@ typedef enum LinkAge {
#define INFTABLE_197 0x197
#define INFTABLE_198 0x198
// 0x199-0x19F
#define INFTABLE_199_19A_19B_19C_19D_19E_19F_INDEX 25
#define INFTABLE_199_MASK (1 << 9)
#define INFTABLE_19A_MASK (1 << 10)
#define INFTABLE_19B_MASK (1 << 11)
#define INFTABLE_19C_MASK (1 << 12)
#define INFTABLE_19D_MASK (1 << 13)
#define INFTABLE_19E_MASK (1 << 14)
#define INFTABLE_19F_MASK (1 << 15)
// INFTABLE 0x199-0x19F
#define INFTABLE_INDEX_199_19A_19B_19C_19D_19E_19F 25
#define INFTABLE_199 0x199
#define INFTABLE_19A 0x19A
#define INFTABLE_19B 0x19B
#define INFTABLE_19C 0x19C
#define INFTABLE_19D 0x19D
#define INFTABLE_19E 0x19E
#define INFTABLE_19F 0x19F
// 0x1A0-0x1AF
#define INFTABLE_1AX_INDEX 26
// INFTABLE 0x1A0-0x1AF
#define INFTABLE_INDEX_1AX 26
#define INFTABLE_1A0_SHIFT 0
#define INFTABLE_1A1_SHIFT 1
#define INFTABLE_1A2_SHIFT 2
@ -881,24 +894,27 @@ typedef enum LinkAge {
#define INFTABLE_1AB_SHIFT 11
#define INFTABLE_1AD_SHIFT 13
// 0x1D0-0x1DF
#define INFTABLE_1DX_INDEX 29
#define GET_INFTABLE(flag) (gSaveContext.save.info.infTable[(flag) >> 4] & (1 << ((flag) & 0xF)))
#define SET_INFTABLE(flag) (gSaveContext.save.info.infTable[(flag) >> 4] |= (1 << ((flag) & 0xF)))
#define CLEAR_INFTABLE(flag) (gSaveContext.save.info.infTable[(flag) >> 4] &= ~(1 << ((flag) & 0xF)))
// INFTABLE 0x1D0-0x1DF
#define INFTABLE_INDEX_1DX INFTABLE_INDEX(INFTABLE_1D0)
#define INFTABLE_1D0 0x1D0
/*
* SaveContext.eventInf
*/
#define EVENTINF_INDEX(flag) ((flag) >> 4)
#define EVENTINF_MASK(flag) (1 << ((flag) & 0xF))
#define GET_EVENTINF(flag) (gSaveContext.eventInf[EVENTINF_INDEX(flag)] & EVENTINF_MASK(flag))
#define SET_EVENTINF(flag) (gSaveContext.eventInf[EVENTINF_INDEX(flag)] |= EVENTINF_MASK(flag))
#define CLEAR_EVENTINF(flag) (gSaveContext.eventInf[EVENTINF_INDEX(flag)] &= ~EVENTINF_MASK(flag))
// EVENTINF 0x00-0x0F
// Ingo Race, Lon Lon Ranch minigames, and Horseback Archery minigame flags
#define EVENTINF_HORSES_INDEX 0
#define EVENTINF_INDEX_HORSES 0
// EVENTINF 0x00-0x03 reserved for IngoRaceState
#define EVENTINF_INGO_RACE_STATE_MASK (0xF << 0)
#define EVENTINF_INGO_RACE_STATE_MASK (0xF << 0x00)
typedef enum IngoRaceState {
/* 0 */ INGO_RACE_STATE_OFFER_RENTAL,
/* 1 */ INGO_RACE_STATE_HORSE_RENTAL_PERIOD,
@ -910,39 +926,35 @@ typedef enum IngoRaceState {
/* 7 */ INGO_RACE_STATE_REMATCH
} IngoRaceState;
#define EVENTINF_INGO_RACE_HORSETYPE 4
#define EVENTINF_INGO_RACE_HORSETYPE_MASK (1 << EVENTINF_INGO_RACE_HORSETYPE)
#define EVENTINF_INGO_RACE_LOST_ONCE 5
#define EVENTINF_INGO_RACE_LOST_ONCE_MASK (1 << EVENTINF_INGO_RACE_LOST_ONCE)
#define EVENTINF_INGO_RACE_SECOND_RACE 6
#define EVENTINF_INGO_RACE_SECOND_RACE_MASK (1 << EVENTINF_INGO_RACE_SECOND_RACE)
#define EVENTINF_INGO_RACE_HORSETYPE 0x04
#define EVENTINF_INGO_RACE_LOST_ONCE 0x05
#define EVENTINF_INGO_RACE_SECOND_RACE 0x06
// Used in z_en_ta (Talon) to store Cucco game winning status
// and in z_en_ge1 (Gerudo) to store archery in-progress status
#define EVENTINF_HORSES_08 8
#define EVENTINF_HORSES_08 0x08
#define EVENTINF_CUCCO_GAME_WON EVENTINF_HORSES_08
// Used in z_en_ta (Talon) and z_en_ma3 (Malon) to store minigame finishing status
#define EVENTINF_HORSES_0A 10
#define EVENTINF_HORSES_0A 0x0A
#define EVENTINF_CUCCO_GAME_FINISHED EVENTINF_HORSES_0A
#define EVENTINF_INGO_RACE_0F 15 // unused?
#define EVENTINF_INGO_RACE_0F_MASK (1 << EVENTINF_INGO_RACE_0F)
#define EVENTINF_INGO_RACE_0F 0x0F // unused?
// "InRaceSeq"
#define GET_EVENTINF_INGO_RACE_STATE() (gSaveContext.eventInf[EVENTINF_HORSES_INDEX] & EVENTINF_INGO_RACE_STATE_MASK)
#define GET_EVENTINF_INGO_RACE_STATE() (gSaveContext.eventInf[EVENTINF_INDEX_HORSES] & EVENTINF_INGO_RACE_STATE_MASK)
#define SET_EVENTINF_INGO_RACE_STATE(v) \
gSaveContext.eventInf[EVENTINF_HORSES_INDEX] = \
(gSaveContext.eventInf[EVENTINF_HORSES_INDEX] & ~EVENTINF_INGO_RACE_STATE_MASK) | (v)
gSaveContext.eventInf[EVENTINF_INDEX_HORSES] = \
(gSaveContext.eventInf[EVENTINF_INDEX_HORSES] & ~EVENTINF_INGO_RACE_STATE_MASK) | (v)
#define GET_EVENTINF_INGO_RACE_FLAG(flag) \
((gSaveContext.eventInf[EVENTINF_HORSES_INDEX] & (1 << ((flag) & 0xF))) >> ((flag) & 0xF))
((gSaveContext.eventInf[EVENTINF_INDEX_HORSES] & EVENTINF_MASK(flag)) >> ((flag) & 0xF))
#define SET_EVENTINF_INGO_RACE_FLAG(flag) \
gSaveContext.eventInf[EVENTINF_HORSES_INDEX] = \
(gSaveContext.eventInf[EVENTINF_HORSES_INDEX] & 0xFFFF) | (1 << ((flag) & 0xF))
gSaveContext.eventInf[EVENTINF_INDEX_HORSES] = \
(gSaveContext.eventInf[EVENTINF_INDEX_HORSES] & 0xFFFF) | EVENTINF_MASK(flag)
#define WRITE_EVENTINF_INGO_RACE_FLAG(flag, v) \
gSaveContext.eventInf[EVENTINF_HORSES_INDEX] = \
(gSaveContext.eventInf[EVENTINF_HORSES_INDEX] & ~(1 << ((flag) & 0xF))) | ((v) << ((flag) & 0xF))
gSaveContext.eventInf[EVENTINF_INDEX_HORSES] = \
(gSaveContext.eventInf[EVENTINF_INDEX_HORSES] & ~EVENTINF_MASK(flag)) | ((v) << ((flag) & 0xF))
#define GET_EVENTINF_INGO_RACE_HORSETYPE() GET_EVENTINF_INGO_RACE_FLAG(EVENTINF_INGO_RACE_HORSETYPE)
#define WRITE_EVENTINF_INGO_RACE_HORSETYPE(v) WRITE_EVENTINF_INGO_RACE_FLAG(EVENTINF_INGO_RACE_HORSETYPE, v)
@ -953,7 +965,7 @@ typedef enum IngoRaceState {
#define EVENTINF_MARATHON_ACTIVE 0x10
// EVENTINF 0x20-0x24
#define EVENTINF_20_21_22_23_24_INDEX 2
#define EVENTINF_INDEX_20_21_22_23_24 2
#define EVENTINF_20_MASK (1 << 0)
#define EVENTINF_21_MASK (1 << 1)
#define EVENTINF_22_MASK (1 << 2)
@ -962,10 +974,6 @@ typedef enum IngoRaceState {
#define EVENTINF_30 0x30
#define GET_EVENTINF(flag) (gSaveContext.eventInf[(flag) >> 4] & (1 << ((flag) & 0xF)))
#define SET_EVENTINF(flag) (gSaveContext.eventInf[(flag) >> 4] |= (1 << ((flag) & 0xF)))
#define CLEAR_EVENTINF(flag) (gSaveContext.eventInf[(flag) >> 4] &= ~(1 << ((flag) & 0xF)))
extern SaveContext gSaveContext;

13
linker_scripts/makerom.ld Normal file
View file

@ -0,0 +1,13 @@
#include "boot.h"
/* These are only here due to iQue entry.s using ori to load the lower halves of symbols
* rather than addiu, so the usual relocation operators %hi() and %lo() can't be used. */
_bootSegmentBssStart_HI = _bootSegmentBssStart >> 16;
_bootSegmentBssSize_HI = _bootSegmentBssSize >> 16;
bootproc_HI = bootproc >> 16;
BOOT_STACK_TOP = (sBootThreadStack + BOOT_STACK_SIZE);
BOOT_STACK_TOP_HI = BOOT_STACK_TOP >> 16;

2
requirements.txt
View file

@ -1,5 +1,5 @@
# Setup and compression
crunch64>=0.3.1,<1.0.0
crunch64>=0.5.1,<1.0.0
ipl3checksum>=1.2.0,<2.0.0
pyyaml>=6.0.1,<7.0.0

6
retail_progress.py
View file

@ -192,7 +192,9 @@ def get_section_hex_dump(path: Path, section: str) -> List[str]:
def parse_hex_dump(lines: List[str]) -> bytes:
result = bytearray()
for line in lines:
data = line[6:41].replace(" ", "")
# strip offset
line = " ".join(line.strip().split(" ", 1)[1])
data = line[:35].replace(" ", "")
result.extend(bytes.fromhex(data))
# pad to 0x10-byte alignment
@ -391,7 +393,7 @@ if __name__ == "__main__":
"--version",
dest="oot_version",
help="version to compare",
default="ntsc-1.2",
default="ique-cn",
)
parser.add_argument(
"--data",

31
spec
View file

@ -6,6 +6,9 @@
beginseg
name "makerom"
// We set the address of the makerom segment as 0x80000400 - 0x1000, since the ROM header and IPL3 together
// are 0x1000 bytes long and we want the entry code to end up at address 0x80000400.
address 0x7FFFF400
include "$(BUILD_DIR)/src/makerom/rom_header.o"
include "$(BUILD_DIR)/src/makerom/ipl3.o"
include "$(BUILD_DIR)/src/makerom/entry.o"
@ -13,7 +16,6 @@ endseg
beginseg
name "boot"
address 0x80000460
include "$(BUILD_DIR)/src/boot/boot_main.o"
include "$(BUILD_DIR)/src/boot/idle.o"
#if OOT_VERSION >= PAL_1_0
@ -21,7 +23,11 @@ beginseg
#endif
include "$(BUILD_DIR)/src/boot/carthandle.o"
include "$(BUILD_DIR)/src/boot/z_std_dma.o"
#if !PLATFORM_IQUE
include "$(BUILD_DIR)/src/boot/yaz0.o"
#else
include "$(BUILD_DIR)/src/boot/inflate.o"
#endif
include "$(BUILD_DIR)/src/boot/z_locale.o"
#if PLATFORM_N64
include "$(BUILD_DIR)/src/boot/cic6105.o"
@ -29,7 +35,11 @@ beginseg
#if DEBUG_FEATURES
include "$(BUILD_DIR)/src/boot/assert.o"
#endif
#if !PLATFORM_IQUE
include "$(BUILD_DIR)/src/boot/is_debug.o"
#else
include "$(BUILD_DIR)/src/boot/is_debug_ique.o"
#endif
include "$(BUILD_DIR)/src/boot/driverominit.o"
include "$(BUILD_DIR)/src/boot/mio0.o"
include "$(BUILD_DIR)/src/libu64/stackcheck.o"
@ -166,6 +176,21 @@ beginseg
include "$(BUILD_DIR)/src/boot/build.o"
include "$(BUILD_DIR)/data/rsp_boot.text.o"
include "$(BUILD_DIR)/data/cic6105.text.o"
#if PLATFORM_IQUE && !defined(COMPILER_GCC)
include "$(BUILD_DIR)/src/libgcc/__divdi3.o"
include "$(BUILD_DIR)/src/libgcc/__moddi3.o"
include "$(BUILD_DIR)/src/libgcc/__udivdi3.o"
include "$(BUILD_DIR)/src/libgcc/__umoddi3.o"
include "$(BUILD_DIR)/src/libgcc/__cmpdi2.o"
include "$(BUILD_DIR)/src/libgcc/__floatdidf.o"
include "$(BUILD_DIR)/src/libgcc/__floatdisf.o"
include "$(BUILD_DIR)/src/libgcc/__fixunsdfdi.o"
include "$(BUILD_DIR)/src/libgcc/__fixdfdi.o"
include "$(BUILD_DIR)/src/libgcc/__fixunssfdi.o"
include "$(BUILD_DIR)/src/libgcc/__fixsfdi.o"
#endif
#ifdef COMPILER_GCC
include "$(BUILD_DIR)/src/libc/memset.o"
include "$(BUILD_DIR)/src/libc/memmove.o"
@ -740,6 +765,7 @@ beginseg
include "$(BUILD_DIR)/src/audio/sequence.o"
include "$(BUILD_DIR)/src/audio/data.o"
include "$(BUILD_DIR)/src/audio/session_config.o"
include "$(BUILD_DIR)/src/audio/session_init.o"
#if PLATFORM_N64
include "$(BUILD_DIR)/src/libu64/gfxprint.o"
include "$(BUILD_DIR)/src/libu64/rcp_utils.o"
@ -805,6 +831,7 @@ beginseg
include "$(BUILD_DIR)/src/libultra/gu/perspective.o"
include "$(BUILD_DIR)/src/libultra/io/sprawdma.o"
include "$(BUILD_DIR)/src/libultra/io/sirawdma.o"
include "$(BUILD_DIR)/src/libultra/bb/sk/skapi.o" // TODO temporary
include "$(BUILD_DIR)/src/libultra/io/sptaskyield.o"
#if DEBUG_FEATURES
include "$(BUILD_DIR)/src/libultra/io/pfsreadwritefile.o"
@ -889,7 +916,7 @@ beginseg
include "$(BUILD_DIR)/src/libultra/mgu/translate.o"
#endif
include "$(BUILD_DIR)/src/libultra/io/contramwrite.o"
#if OOT_VERSION == NTSC_1_2 || (PLATFORM_GC && !DEBUG_FEATURES)
#if OOT_VERSION >= PAL_1_0 && !(OOT_PAL_N64 || DEBUG_FEATURES)
include "$(BUILD_DIR)/src/libultra/io/vimodefpallan1.o"
#endif
#if !DEBUG_FEATURES

36
src/audio/general.c
View file

@ -8,6 +8,8 @@
#define AUDIO_PRINTF osSyncPrintf
#elif IDO_PRINTF_WORKAROUND
#define AUDIO_PRINTF(args) (void)0
#elif defined(__GNUC__) && __GNUC__ < 3
#define AUDIO_PRINTF(format, args...) (void)0
#else
#define AUDIO_PRINTF(format, ...) (void)0
#endif
@ -1188,7 +1190,7 @@ u8 D_8016B9F3;
u8 sFanfareStartTimer;
u16 sFanfareSeqId;
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
u16 sPrevAmbienceSeqId;
#endif
@ -1706,7 +1708,7 @@ void AudioOcarina_PlayControllerInput(u8 unused) {
} else {
// no bending or vibrato for recording state OCARINA_RECORD_SCARECROW_SPAWN
sCurOcarinaBendIndex = 0;
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
sCurOcarinaVibrato = 0;
#endif
sCurOcarinaBendFreq = 1.0f; // No bend
@ -1853,7 +1855,7 @@ void AudioOcarina_PlaybackSong(void) {
}
// Update vibrato
#if OOT_VERSION < PAL_1_0 || PLATFORM_GC
#if OOT_VERSION < PAL_1_0 || !PLATFORM_N64
if (sNotePlaybackVibrato != sPlaybackSong[sPlaybackNotePos].vibrato) {
sNotePlaybackVibrato = sPlaybackSong[sPlaybackNotePos].vibrato;
// Sets vibrato to io port 6
@ -2144,7 +2146,7 @@ void AudioOcarina_RecordSong(void) {
} else if (sRecordOcarinaVolume != sCurOcarinaVolume) {
noteChanged = true;
} else if (sRecordOcarinaVibrato != sCurOcarinaVibrato) {
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (sRecordingState != OCARINA_RECORD_SCARECROW_SPAWN) {
noteChanged = true;
}
@ -2152,7 +2154,7 @@ void AudioOcarina_RecordSong(void) {
noteChanged = true;
#endif
} else if (sRecordOcarinaBendIndex != sCurOcarinaBendIndex) {
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (sRecordingState != OCARINA_RECORD_SCARECROW_SPAWN) {
noteChanged = true;
}
@ -2493,7 +2495,7 @@ f32 Audio_ComputeSfxFreqScale(u8 bankId, u8 entryIdx) {
switch (bankId) {
case BANK_VOICE:
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (((entry->sfxId & 0xFF) < 0x40) && (sAudioBaseFilter2 != 0)) {
phi_v0 = true;
} else if (((entry->sfxId & 0xFF) >= 0x40) && (sAudioExtraFilter2 != 0)) {
@ -2614,7 +2616,7 @@ void Audio_SetSfxProperties(u8 bankId, u8 entryIdx, u8 channelIndex) {
f32 behindScreenZ;
u8 baseFilter = 0;
SfxBankEntry* entry = &gSfxBanks[bankId][entryIdx];
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
s32 pad;
#endif
@ -2655,7 +2657,7 @@ void Audio_SetSfxProperties(u8 bankId, u8 entryIdx, u8 channelIndex) {
}
}
if (sAudioBaseFilter != 0) {
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if ((bankId == BANK_PLAYER) || (bankId == BANK_ITEM) ||
((bankId == BANK_VOICE) && ((entry->sfxId & 0xFF) < 0x40)))
#else
@ -3239,7 +3241,7 @@ void Audio_PlaySceneSequence(u16 seqId) {
AUDIOCMD_GLOBAL_STOP_AUDIOCMDS();
}
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (Audio_GetActiveSeqId(SEQ_PLAYER_BGM_MAIN) != NA_BGM_DISABLED) {
Audio_StopSequence(SEQ_PLAYER_BGM_MAIN, 0);
AUDIOCMD_GLOBAL_STOP_AUDIOCMDS();
@ -3383,7 +3385,7 @@ void func_800F5B58(void) {
if (sPrevMainBgmSeqId == NA_BGM_DISABLED) {
SEQCMD_STOP_SEQUENCE(SEQ_PLAYER_BGM_MAIN, 0);
} else {
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (sPrevMainBgmSeqId == NA_BGM_NATURE_AMBIENCE) {
sPrevMainBgmSeqId = sPrevAmbienceSeqId;
}
@ -3519,7 +3521,7 @@ void Audio_SetSequenceMode(u8 seqMode) {
volumeFadeInTimer);
SEQCMD_PLAY_SEQUENCE(SEQ_PLAYER_BGM_SUB, 10, 8, NA_BGM_ENEMY);
#if OOT_VERSION < PAL_1_0 || PLATFORM_GC
#if OOT_VERSION < PAL_1_0 || !PLATFORM_N64
if (seqId != NA_BGM_NATURE_AMBIENCE)
#else
if (seqId > NA_BGM_NATURE_AMBIENCE)
@ -3544,7 +3546,7 @@ void Audio_SetSequenceMode(u8 seqMode) {
sPrevSeqMode = seqMode + 0x80;
} else {
#if OOT_VERSION < NTSC_1_1 || PLATFORM_GC
#if OOT_VERSION < NTSC_1_1 || !PLATFORM_N64
// Empty
#elif OOT_VERSION < PAL_1_0
if ((seqMode == SEQ_MODE_ENEMY) && (seqId != NA_BGM_FIELD_LOGIC) &&
@ -3600,7 +3602,7 @@ void Audio_SetBgmEnemyVolume(f32 dist) {
sAudioEnemyVol = ((350.0f - adjDist) * 127.0f) / 350.0f;
Audio_SetVolumeScale(SEQ_PLAYER_BGM_SUB, VOL_SCALE_INDEX_BGM_SUB, sAudioEnemyVol, 10);
#if OOT_VERSION < PAL_1_0 || PLATFORM_GC
#if OOT_VERSION < PAL_1_0 || !PLATFORM_N64
if (gActiveSeqs[SEQ_PLAYER_BGM_MAIN].seqId != NA_BGM_NATURE_AMBIENCE)
#else
if (gActiveSeqs[SEQ_PLAYER_BGM_MAIN].seqId > NA_BGM_NATURE_AMBIENCE)
@ -3610,7 +3612,7 @@ void Audio_SetBgmEnemyVolume(f32 dist) {
}
}
#if OOT_VERSION < PAL_1_0 || PLATFORM_GC
#if OOT_VERSION < PAL_1_0 || !PLATFORM_N64
if (gActiveSeqs[SEQ_PLAYER_BGM_MAIN].seqId != NA_BGM_NATURE_AMBIENCE)
#else
if (gActiveSeqs[SEQ_PLAYER_BGM_MAIN].seqId > NA_BGM_NATURE_AMBIENCE)
@ -3928,7 +3930,7 @@ void func_800F6C34(void) {
sFanfareStartTimer = 0;
D_8016B9F3 = 1;
sMalonSingingDisabled = false;
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
sPrevAmbienceSeqId = NA_BGM_DISABLED;
#endif
}
@ -3989,7 +3991,7 @@ void Audio_StartNatureAmbienceSequence(u16 playerIO, u16 channelMask) {
}
#endif
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if ((Audio_GetActiveSeqId(SEQ_PLAYER_BGM_MAIN) != NA_BGM_DISABLED) &&
(Audio_GetActiveSeqId(SEQ_PLAYER_BGM_MAIN) != NA_BGM_NATURE_AMBIENCE)) {
Audio_StopSequence(SEQ_PLAYER_BGM_MAIN, 0);
@ -4023,7 +4025,7 @@ void Audio_PlayNatureAmbienceSequence(u8 natureAmbienceId) {
if ((gActiveSeqs[SEQ_PLAYER_BGM_MAIN].seqId == NA_BGM_DISABLED) ||
!(sSeqFlags[gActiveSeqs[SEQ_PLAYER_BGM_MAIN].seqId & 0xFF & 0xFF] & SEQ_FLAG_NO_AMBIENCE)) {
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (gActiveSeqs[SEQ_PLAYER_BGM_MAIN].seqId != NA_BGM_NATURE_AMBIENCE) {
sPrevAmbienceSeqId = gActiveSeqs[SEQ_PLAYER_BGM_MAIN].seqId;
}

3
src/audio/lib/load.c
View file

@ -1250,8 +1250,7 @@ void AudioLoad_Init(void* heap, u32 heapSize) {
ramAddr = AudioHeap_Alloc(&gAudioCtx.initPool, gAudioHeapInitSizes.permanentPoolSize);
if (ramAddr == NULL) {
// cast away const from gAudioHeapInitSizes
*((u32*)&gAudioHeapInitSizes.permanentPoolSize) = 0;
gAudioHeapInitSizes.permanentPoolSize = 0;
}
AudioHeap_InitPool(&gAudioCtx.permanentPool, ramAddr, gAudioHeapInitSizes.permanentPoolSize);

4
src/audio/lib/seqplayer.c
View file

@ -437,7 +437,7 @@ void AudioSeq_SequencePlayerDisableAsFinished(SequencePlayer* seqPlayer) {
void AudioSeq_SequencePlayerDisable(SequencePlayer* seqPlayer) {
s32 finished = 0;
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (seqPlayer->finished == 1) {
finished = 1;
}
@ -457,7 +457,7 @@ void AudioSeq_SequencePlayerDisable(SequencePlayer* seqPlayer) {
}
if (AudioLoad_IsFontLoadComplete(seqPlayer->defaultFont)) {
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (finished == 1) {
AudioHeap_ReleaseNotesForFont(seqPlayer->defaultFont);
}

4
src/audio/lib/synthesis.c
View file

@ -644,7 +644,7 @@ Acmd* AudioSynth_DoOneAudioUpdate(s16* aiBuf, s32 aiBufLen, Acmd* cmd, s32 updat
// Leak reverb between the left and right channels
#if OOT_VERSION < NTSC_1_1 || PLATFORM_GC
#if OOT_VERSION < NTSC_1_1 || !PLATFORM_N64
if ((reverb->leakRtl != 0) || (reverb->leakLtr != 0))
#else
if (((reverb->leakRtl != 0) || (reverb->leakLtr != 0)) && (gAudioCtx.soundMode != SOUNDMODE_MONO))
@ -785,7 +785,7 @@ Acmd* AudioSynth_ProcessNote(s32 noteIndex, NoteSubEu* noteSubEu, NoteSynthesisS
samplesLenFixedPoint = (resamplingRateFixedPoint * aiBufLen * 2) + synthState->samplePosFrac;
numSamplesToLoad = samplesLenFixedPoint >> 16;
#if !(OOT_VERSION < NTSC_1_1 || PLATFORM_GC)
#if !(OOT_VERSION < NTSC_1_1 || !PLATFORM_N64)
if (numSamplesToLoad == 0) {
skipBytes = false;
}

4
src/audio/lib/thread.c
View file

@ -17,7 +17,7 @@ AudioTask* AudioThread_Update(void) {
return AudioThread_UpdateImpl();
}
#if !(OOT_VERSION < PAL_1_0 || PLATFORM_GC)
#if !(OOT_VERSION < PAL_1_0 || !PLATFORM_N64)
static s32 sMaxAbiCmdCnt = 0x80;
static AudioTask* sWaitingAudioTask = NULL;
#endif
@ -26,7 +26,7 @@ static AudioTask* sWaitingAudioTask = NULL;
* This is Audio_Update for the audio thread
*/
AudioTask* AudioThread_UpdateImpl(void) {
#if OOT_VERSION < PAL_1_0 || PLATFORM_GC
#if OOT_VERSION < PAL_1_0 || !PLATFORM_N64
static s32 sMaxAbiCmdCnt = 0x80;
static AudioTask* sWaitingAudioTask = NULL;
#endif

24
src/audio/session_config.c
View file

@ -1,33 +1,9 @@
#include "global.h"
#include "assets/audio/sequence_sizes.h"
#include "assets/audio/soundfont_sizes.h"
#define SFX_SEQ_SIZE Sequence_0_SIZE
#define SFX_SOUNDFONTS_SIZE (Soundfont_0_SIZE + Soundfont_1_SIZE)
AudioContext gAudioCtx;
AudioCustomUpdateFunction gAudioCustomUpdateFunction;
s32 D_801755D8[3]; // unused
const TempoData gTempoData = {
0x1C00, // unk_00
SEQTICKS_PER_BEAT, // seqTicksPerBeat
};
// Sizes of everything on the init pool
#define AI_BUFFERS_SIZE (AIBUF_SIZE * ARRAY_COUNT(gAudioCtx.aiBuffers))
#define SOUNDFONT_LIST_SIZE (NUM_SOUNDFONTS * sizeof(SoundFont))
#if OOT_VERSION < PAL_1_0 || PLATFORM_GC
#define PERMANENT_POOL_SIZE (SFX_SEQ_SIZE + SFX_SOUNDFONTS_SIZE)
#else
#define PERMANENT_POOL_SIZE (SFX_SEQ_SIZE + SFX_SOUNDFONTS_SIZE + 0x10)
#endif
const AudioHeapInitSizes gAudioHeapInitSizes = {
ALIGN16(sizeof(gAudioHeap) - 0x100), // audio heap size
ALIGN16(PERMANENT_POOL_SIZE + AI_BUFFERS_SIZE + SOUNDFONT_LIST_SIZE), // init pool size
ALIGN16(PERMANENT_POOL_SIZE), // permanent pool size
};
#define DEFAULT_REVERB_SETTINGS \
{ 1, 0x30, 0x3000, 0, 0, 0x7FFF, 0x0000, 0x0000, 0xFF, 0x3000, 0x0, 0x0 }

26
src/audio/session_init.c Normal file
View file

@ -0,0 +1,26 @@
#include "global.h"
#include "assets/audio/sequence_sizes.h"
#include "assets/audio/soundfont_sizes.h"
#define SFX_SEQ_SIZE Sequence_0_SIZE
#define SFX_SOUNDFONTS_SIZE (Soundfont_0_SIZE + Soundfont_1_SIZE)
TempoData gTempoData = {
0x1C00, // unk_00
SEQTICKS_PER_BEAT, // seqTicksPerBeat
};
// Sizes of everything on the init pool
#define AI_BUFFERS_SIZE (AIBUF_SIZE * ARRAY_COUNT(gAudioCtx.aiBuffers))
#define SOUNDFONT_LIST_SIZE (NUM_SOUNDFONTS * sizeof(SoundFont))
#if OOT_VERSION < PAL_1_0 || !PLATFORM_N64
#define PERMANENT_POOL_SIZE (SFX_SEQ_SIZE + SFX_SOUNDFONTS_SIZE)
#else
#define PERMANENT_POOL_SIZE (SFX_SEQ_SIZE + SFX_SOUNDFONTS_SIZE + 0x10)
#endif
AudioHeapInitSizes gAudioHeapInitSizes = {
ALIGN16(sizeof(gAudioHeap) - 0x100), // audio heap size
ALIGN16(PERMANENT_POOL_SIZE + AI_BUFFERS_SIZE + SOUNDFONT_LIST_SIZE), // init pool size
ALIGN16(PERMANENT_POOL_SIZE), // permanent pool size
};

2
src/audio/sfx.c
View file

@ -342,7 +342,7 @@ void Audio_ChooseActiveSfx(u8 bankId) {
entry->sfxId, entry->posX, entry->posZ, *entry->posX, *entry->posY, *entry->posZ);
}
entry->priority = (u32)entry->dist + (SQ(0xFF - sfxImportance) * SQ(76));
#if OOT_VERSION < NTSC_1_1 || PLATFORM_GC
#if OOT_VERSION < NTSC_1_1 || !PLATFORM_N64
temp3 = entry->sfxId; // fake
entry->priority = entry->priority + temp3 - temp3;
#endif

7
src/boot/driverominit.c
View file

@ -3,7 +3,14 @@
OSPiHandle __DriveRomHandle;
OSPiHandle* osDriveRomInit(void) {
#if PLATFORM_IQUE && defined(NON_MATCHING)
// On iQue, the compiled output of this file is patched so that the
// `!first` check is always taken. For non-matching builds, we edit the
// source code instead.
static u32 first = false;
#else
static u32 first = true;
#endif
register s32 status;
register u32 value;
register u32 prevInt;

4
src/boot/idle.c
View file

@ -57,7 +57,7 @@ void Idle_ThreadEntry(void* arg) {
PRINTF(T("作製者 : %s\n", "Created by: %s\n"), gBuildCreator);
PRINTF(T("作成日時 : %s\n", "Created : %s\n"), gBuildDate);
PRINTF("MAKEOPTION: %s\n", gBuildMakeOption);
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF(T("ＲＡＭサイズは %d キロバイトです(osMemSize/osGetMemSize)\n",
"RAM size is %d kilobytes (osMemSize/osGetMemSize)\n"),
(s32)osMemSize / 1024);
@ -70,7 +70,7 @@ void Idle_ThreadEntry(void* arg) {
PRINTF(T("ＹＩＥＬＤバッファのサイズは %d キロバイトです\n", "YIELD buffer size is %d kilobytes\n"), 3);
PRINTF(T("オーディオヒープのサイズは %d キロバイトです\n", "Audio heap size is %d kilobytes\n"),
((intptr_t)&gAudioHeap[ARRAY_COUNT(gAudioHeap)] - (intptr_t)gAudioHeap) / 1024);
PRINTF(VT_RST);
PRINTF_RST();
osCreateViManager(OS_PRIORITY_VIMGR);

1003
src/boot/inflate.c Normal file
View file

File diff suppressed because it is too large Load diff

8
src/boot/is_debug_ique.c Normal file
View file

@ -0,0 +1,8 @@
void osSyncPrintfUnused() {
}
void osSyncPrintf() {
}
void rmonPrintf() {
}

92
src/boot/mio0.s
View file

@ -1,10 +1,7 @@
#include "ultra64/asm.h"
#include "ultra64/regdef.h"
.set noreorder
.section .text
.balign 16
.text
/**
* void Mio0_Decompress(void* src, void* dst);
@ -12,53 +9,56 @@
* Decompress Mio0 chunk
*/
LEAF(Mio0_Decompress)
lw $a3, 8($a0) // compressed offset
lw $t9, 0xC($a0) // uncompressed offset
lw $t8, 4($a0) // decompressed length
add $a3, $a3, $a0 // compressed start
add $t9, $t9, $a0 // uncompressed start
move $a2, $zero // 0
addi $a0, $a0, 0x10 // move past header
add $t8, $t8, $a1 // dst + decompressed length = end
lw a3, 0x08(a0) /* compressed offset */
lw t9, 0x0C(a0) /* uncompressed offset */
lw t8, 0x04(a0) /* decompressed length */
add a3, a3, a0 /* compressed start */
add t9, t9, a0 /* uncompressed start */
move a2, zero /* 0 */
addi a0, a0, 0x10 /* move past header */
add t8, t8, a1 /* dst + decompressed length = end */
mainloop:
bnez $a2, 1f
nop
lw $t0, ($a0)
li $a2, 32
addi $a0, $a0, 4
bnez a2, 1f
lw t0, (a0)
li a2, 32
addi a0, a0, 4
1:
slt $t1, $t0, $zero
beqz $t1, read_comp
nop
lb $t2, ($t9) // read 1 byte from uncompressed data
addi $t9, $t9, 1 // advance uncompressed start
addi $a1, $a1, 1
slt t1, t0, zero
beqz t1, read_comp
lb t2, (t9) /* read 1 byte from uncompressed data */
sb t2, (a1) /* store uncompressed byte */
addi t9, t9, 1 /* advance uncompressed start */
addi a1, a1, 1
b next_iter
sb $t2, -1($a1) // store uncompressed byte
read_comp:
lhu $t2, ($a3) // read 2 bytes from compressed data
addi $a3, $a3, 2 // advance compressed start
srl $t3, $t2, 0xC
andi $t2, $t2, 0xFFF
beqz $t3, 3f
sub $t1, $a1, $t2
addi $t3, $t3, 2
lhu t2, (a3) /* read 2 bytes from compressed data */
addi a3, a3, 2 /* advance compressed start */
srl t3, t2, 0xC
andi t2, t2, 0xFFF
sub t1, a1, t2
beqz t3, 3f
addi t3, t3, 2
2:
lb $t2, -1($t1)
addi $t3, $t3, -1
addi $t1, $t1, 1
addi $a1, $a1, 1
bnez $t3, 2b
sb $t2, -1($a1)
lb t2, -1(t1)
addi t3, t3, -1
addi t1, t1, 1
sb t2, (a1)
addi a1, a1, 1
bnez t3, 2b
next_iter:
sll $t0, $t0, 1
bne $a1, $t8, mainloop // continue until decompressed length is reached
addi $a2, $a2, -1
jr $ra
nop
sll t0, t0, 1
addi a2, a2, -1
bne a1, t8, mainloop /* continue until decompressed length is reached */
jr ra
3:
lbu $t3, ($t9)
addi $t9, $t9, 1
lbu t3, (t9)
addi t9, t9, 1
addi t3, t3, 0x12
b 2b
addi $t3, $t3, 0x12
END(Mio0_Decompress)

10
src/boot/z_locale.c
View file

@ -7,7 +7,7 @@
s32 gCurrentRegion = 0;
void Locale_Init(void) {
#if PLATFORM_N64
#if !PLATFORM_GC
ALIGNED(4) u8 regionInfo[4];
u8 countryCode;
@ -24,6 +24,7 @@ void Locale_Init(void) {
countryCode = sCartInfo.countryCode;
#endif
#if !PLATFORM_IQUE
switch (countryCode) {
case 'J': // "NTSC-J (Japan)"
gCurrentRegion = REGION_JP;
@ -37,16 +38,19 @@ void Locale_Init(void) {
break;
#endif
default:
PRINTF(VT_COL(RED, WHITE));
PRINTF_COLOR_ERROR();
PRINTF(T("z_locale_init: 日本用かアメリカ用か判別できません\n",
"z_locale_init: Can't tell if it's for Japan or America\n"));
LogUtils_HungupThread("../z_locale.c", LN4(86, 92, 101, 118));
LogUtils_HungupThread("../z_locale.c", LN4(86, 92, 101, UNK_LINE, 118));
PRINTF(VT_RST);
break;
}
PRINTF(T("z_locale_init:日本用かアメリカ用か３コンで判断させる\n",
"z_locale_init: Determine whether it is for Japan or America using 3 controls\n"));
#else
gCurrentRegion = REGION_US;
#endif
}
void Locale_ResetRegion(void) {

109
src/boot/z_std_dma.c
View file

@ -28,7 +28,7 @@
#endif
#pragma increment_block_number "gc-eu:128 gc-eu-mq:128 gc-jp:128 gc-jp-ce:128 gc-jp-mq:128 gc-us:128 gc-us-mq:128" \
"ntsc-1.2:82 pal-1.0:80 pal-1.1:80"
"ntsc-1.2:70 pal-1.0:68 pal-1.1:68"
StackEntry sDmaMgrStackInfo;
OSMesgQueue sDmaMgrMsgQueue;
@ -53,11 +53,20 @@ const char* sDmaMgrFileNames[] = {
#include "tables/dmadata_table.h"
};
#endif
#undef DEFINE_DMA_ENTRY
#if PLATFORM_N64 || DEBUG_FEATURES
#endif
#define SET_IOMSG(ioMsg, queue, rom, ram, buffSize) \
do { \
(ioMsg).hdr.pri = OS_MESG_PRI_NORMAL; \
(ioMsg).hdr.retQueue = (queue); \
(ioMsg).devAddr = (rom); \
(ioMsg).dramAddr = (ram); \
(ioMsg).size = (buffSize); \
} while (0)
#if !PLATFORM_GC || DEBUG_FEATURES
/**
* Compares `str1` and `str2`.
*
@ -103,6 +112,9 @@ s32 DmaMgr_DmaRomToRam(uintptr_t rom, void* ram, size_t size) {
OSMesg msg;
s32 ret;
size_t buffSize = gDmaMgrDmaBuffSize;
#if DEBUG_FEATURES
UNUSED s32 pad;
#endif
if (buffSize == 0) {
buffSize = DMAMGR_DEFAULT_BUFSIZE;
@ -116,13 +128,7 @@ s32 DmaMgr_DmaRomToRam(uintptr_t rom, void* ram, size_t size) {
// The system avoids large DMAs as these would stall the PI for too long, potentially causing issues with
// audio. To allow audio to continue to DMA whenever it needs to, other DMAs are split into manageable chunks.
if (1) {} // Necessary to match
ioMsg.hdr.pri = OS_MESG_PRI_NORMAL;
ioMsg.hdr.retQueue = &queue;
ioMsg.devAddr = rom;
ioMsg.dramAddr = ram;
ioMsg.size = buffSize;
SET_IOMSG(ioMsg, &queue, rom, ram, buffSize);
if (gDmaMgrVerbose == 10) {
PRINTF(T("%10lld ノーマルＤＭＡ %08x %08x %08x (%d)\n", "%10lld Normal DMA %08x %08x %08x (%d)\n"),
@ -151,15 +157,9 @@ s32 DmaMgr_DmaRomToRam(uintptr_t rom, void* ram, size_t size) {
ram = (u8*)ram + buffSize;
}
if (1) { // Also necessary to match
s32 pad[2];
}
SET_IOMSG(ioMsg, &queue, rom, ram, size);
ioMsg.hdr.pri = OS_MESG_PRI_NORMAL;
ioMsg.hdr.retQueue = &queue;
ioMsg.devAddr = rom;
ioMsg.dramAddr = ram;
ioMsg.size = size;
{ UNUSED s32 pad2; }
if (gDmaMgrVerbose == 10) {
PRINTF(T("%10lld ノーマルＤＭＡ %08x %08x %08x (%d)\n", "%10lld Normal DMA %08x %08x %08x (%d)\n"),
@ -242,11 +242,7 @@ void DmaMgr_DmaFromDriveRom(void* ram, uintptr_t rom, size_t size) {
osInvalDCache(ram, size);
osCreateMesgQueue(&queue, &msg, 1);
ioMsg.hdr.retQueue = &queue;
ioMsg.hdr.pri = OS_MESG_PRI_NORMAL;
ioMsg.devAddr = rom;
ioMsg.dramAddr = ram;
ioMsg.size = size;
SET_IOMSG(ioMsg, &queue, rom, ram, size);
handle->transferInfo.cmdType = 2;
osEPiStartDma(handle, &ioMsg, OS_READ);
@ -272,7 +268,7 @@ NORETURN void DmaMgr_Error(DmaRequest* req, const char* filename, const char* er
char buff2[80];
PRINTF("%c", BEL);
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("DMA致命的エラー(%s)\nROM:%X RAM:%X SIZE:%X %s\n", "DMA Fatal Error (%s)\nROM:%X RAM:%X SIZE:%X %s\n"),
errorDesc != NULL ? errorDesc : (errorName != NULL ? errorName : "???"), vrom, ram, size,
filename != NULL ? filename : "???");
@ -283,7 +279,7 @@ NORETURN void DmaMgr_Error(DmaRequest* req, const char* filename, const char* er
PRINTF("DMA ERROR: %s %d", sDmaMgrCurFileName, sDmaMgrCurFileLine);
}
PRINTF(VT_RST);
PRINTF_RST();
if (req->filename != NULL) {
sprintf(buff1, "DMA ERROR: %s %d", req->filename, req->line);
@ -350,7 +346,7 @@ const char* DmaMgr_GetFileName(uintptr_t vrom) {
return ret;
#elif PLATFORM_GC
return "";
#elif PLATFORM_N64
#else
return "??";
#endif
}
@ -380,19 +376,16 @@ void DmaMgr_ProcessRequest(DmaRequest* req) {
if (vrom >= iter->file.vromStart && vrom < iter->file.vromEnd) {
// Found the region this request falls into
#if PLATFORM_N64
// Based on the MM Debug ROM, these strings are part of the condition for the empty if statement below,
// as `... && DmaMgr_StrCmp("", "kanji") != 0 && DmaMgr_StrCmp("", "link_animetion") != 0`
(void)"";
(void)"kanji";
(void)"";
(void)"link_animetion";
#endif
if (0) {
// The string is defined in .rodata of debug builds but not used, suggesting a debug print is here
// but was optimized out in some way.
PRINTF("DMA ROM:%08X RAM:%08X SIZE:%08X %s\n", vrom, ram, size, filename);
#if !PLATFORM_GC
// Based on the MM Debug ROM, these strings are part of the condition for the empty if statement below
if (DmaMgr_StrCmp("", "kanji") != 0 && DmaMgr_StrCmp("", "link_animetion") != 0)
#endif
{
// The string is defined in .rodata of debug builds but not used, suggesting a debug print is here
// but was optimized out in some way.
PRINTF("DMA ROM:%08X RAM:%08X SIZE:%08X %s\n", vrom, ram, size, filename);
}
}
if (iter->romEnd == 0) {
@ -405,10 +398,10 @@ void DmaMgr_ProcessRequest(DmaRequest* req) {
DMA_ERROR(req, filename, "Segment Alignment Error",
T("セグメント境界をまたがってＤＭＡ転送することはできません",
"DMA transfers cannot cross segment boundaries"),
"../z_std_dma.c", LN3(575, 578, 726));
"../z_std_dma.c", LN3(575, 578, 595, 726));
}
DmaMgr_DmaRomToRam(iter->romStart + (vrom - iter->file.vromStart), ram, size);
DmaMgr_DmaRomToRam(iter->romStart + vrom - iter->file.vromStart, ram, size);
found = true;
if (0) {
@ -417,16 +410,16 @@ void DmaMgr_ProcessRequest(DmaRequest* req) {
} else {
// File is compressed. Files that are stored compressed must be loaded into RAM all at once.
romStart = iter->romStart;
romSize = iter->romEnd - iter->romStart;
romStart = iter->romStart;
if (vrom != iter->file.vromStart) {
if (iter->file.vromStart != vrom) {
// Error, requested vrom is not the start of a file
DMA_ERROR(req, filename, "Can't Transfer Segment",
T("圧縮されたセグメントの途中からはＤＭＡ転送することはできません",
"DMA transfer cannot be performed from the middle of a compressed segment"),
"../z_std_dma.c", LN3(595, 598, 746));
"../z_std_dma.c", LN3(595, 598, 615, 746));
}
if (size != iter->file.vromEnd - iter->file.vromStart) {
@ -435,13 +428,19 @@ void DmaMgr_ProcessRequest(DmaRequest* req) {
DMA_ERROR(req, filename, "Can't Transfer Segment",
T("圧縮されたセグメントの一部だけをＤＭＡ転送することはできません",
"It is not possible to DMA only part of a compressed segment"),
"../z_std_dma.c", LN3(601, 604, 752));
"../z_std_dma.c", LN3(601, 604, 621, 752));
}
// Reduce the thread priority and decompress the file, the decompression routine handles the DMA
// in chunks. Restores the thread priority when done.
osSetThreadPri(NULL, THREAD_PRI_DMAMGR_LOW);
#if !PLATFORM_IQUE
Yaz0_Decompress(romStart, ram, romSize);
#else
gzip_decompress(romStart, ram, romSize);
#endif
osSetThreadPri(NULL, THREAD_PRI_DMAMGR);
found = true;
@ -452,7 +451,7 @@ void DmaMgr_ProcessRequest(DmaRequest* req) {
break;
}
#if PLATFORM_N64
#if !PLATFORM_GC
if (i != 0) {
i += 4;
}
@ -469,11 +468,12 @@ void DmaMgr_ProcessRequest(DmaRequest* req) {
DMA_ERROR(req, NULL, "DATA DON'T EXIST",
T("該当するデータが存在しません", "Corresponding data does not exist"), "../z_std_dma.c",
LN3(621, 624, 771));
LN3(621, 624, 641, 771));
return;
} else {
// ROM is uncompressed, allow arbitrary DMA even if the region is not marked in the filesystem
DmaMgr_DmaRomToRam(vrom, ram, size);
romStart = vrom;
DmaMgr_DmaRomToRam(romStart, ram, size);
if (0) {
PRINTF(T("No Press ROM:%08X RAM:%08X SIZE:%08X (非公式)\n",
@ -534,6 +534,10 @@ s32 DmaMgr_RequestAsync(DmaRequest* req, void* ram, uintptr_t vrom, size_t size,
OSMesg msg) {
static s32 sDmaMgrQueueFullLogged = 0;
#if PLATFORM_IQUE
PRINTF("dmacopy_bg(%x, %x, %x, %x, %x, %x, %x)\n", req, ram, vrom, size, unk, queue, msg);
#endif
#if DEBUG_FEATURES
if ((ram == NULL) || (osMemSize < OS_K0_TO_PHYSICAL(ram) + size) || (vrom & 1) || (vrom > 0x4000000) ||
(size == 0) || (size & 1)) {
@ -562,12 +566,12 @@ s32 DmaMgr_RequestAsync(DmaRequest* req, void* ram, uintptr_t vrom, size_t size,
if (1 && (sDmaMgrQueueFullLogged == 0) && MQ_IS_FULL(&sDmaMgrMsgQueue)) {
sDmaMgrQueueFullLogged++;
PRINTF("%c", BEL);
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("dmaEntryMsgQが一杯です。キューサイズの再検討をおすすめします。",
"dmaEntryMsgQ is full. Reconsider your queue size."));
LOG_NUM("(sizeof(dmaEntryMsgBufs) / sizeof(dmaEntryMsgBufs[0]))", ARRAY_COUNT(sDmaMgrMsgBuf), "../z_std_dma.c",
952);
PRINTF(VT_RST);
PRINTF_RST();
}
#endif
@ -608,9 +612,10 @@ void DmaMgr_Init(void) {
// DMA the dma data table to RAM
DmaMgr_DmaRomToRam((uintptr_t)_dmadataSegmentRomStart, _dmadataSegmentStart,
(u32)(_dmadataSegmentRomEnd - _dmadataSegmentRomStart));
PRINTF("dma_rom_ad[]\n");
#if DEBUG_FEATURES
PRINTF("dma_rom_ad[]\n");
name = sDmaMgrFileNames;
iter = gDmaDataTable;
idx = 0;
@ -641,7 +646,7 @@ void DmaMgr_Init(void) {
PRINTF("_bootSegmentRomStart(%08x) != dma_rom_ad[0].rom_b(%08x)\n", _bootSegmentRomStart,
gDmaDataTable[0].file.vromEnd);
//! @bug The main code file where fault.c resides is not yet loaded
Fault_AddHungupAndCrash("../z_std_dma.c", LN3(837, 840, 1055));
Fault_AddHungupAndCrash("../z_std_dma.c", LN3(837, 840, 859, 1055));
}
// Start the DMA manager

1
src/boot/zlib.c Normal file
View file

@ -0,0 +1 @@

4
src/code/db_camera.c
View file

@ -1,7 +1,5 @@
#include "global.h"
#if DEBUG_FEATURES
#define DEBUG_CAM_CONTROLLER_PORT 2
static PlayState* sPlay;
@ -2368,5 +2366,3 @@ void func_800BB060(void) {
int func_800BB06C(void) {
return sDebugCamPtr->unk_00 == 2 && sDebugCamAnim.unk_0A != 0;
}
#endif

8
src/code/fault_gc.c
View file

@ -40,10 +40,8 @@
* DPad-Up may be pressed to enable sending fault pages over osSyncPrintf as well as displaying them on-screen.
* DPad-Down disables sending fault pages over osSyncPrintf.
*/
#if PLATFORM_GC
#pragma increment_block_number "gc-eu:160 gc-eu-mq:160 gc-eu-mq-dbg:160 gc-jp:176 gc-jp-ce:176 gc-jp-mq:176 gc-us:176" \
"gc-us-mq:176"
#pragma increment_block_number "gc-eu:160 gc-eu-mq:160 gc-eu-mq-dbg:160 gc-jp:160 gc-jp-ce:160 gc-jp-mq:160 gc-us:160" \
"gc-us-mq:160"
#include "global.h"
#include "alloca.h"
@ -1340,5 +1338,3 @@ NORETURN void Fault_AddHungupAndCrash(const char* file, int line) {
sprintf(msg, "HungUp %s:%d", file, line);
Fault_AddHungupAndCrashImpl(msg, NULL);
}
#endif

4
src/code/fault_gc_drawer.c
View file

@ -9,8 +9,6 @@
#include "terminal.h"
#pragma increment_block_number "gc-jp:128 gc-jp-ce:128 gc-jp-mq:128 gc-us:128 gc-us-mq:128"
#if PLATFORM_GC
typedef struct FaultDrawer {
/* 0x00 */ u16* fb;
/* 0x04 */ u16 w;
@ -344,5 +342,3 @@ void Fault_InitDrawer(void) {
bcopy(&sFaultDrawerDefault, &sFaultDrawer, sizeof(FaultDrawer));
sFaultDrawer.fb = (u16*)(PHYS_TO_K0(osMemSize) - sizeof(u16[SCREEN_HEIGHT][SCREEN_WIDTH]));
}
#endif

4
src/code/fault_n64.c
View file

@ -1,5 +1,3 @@
#if PLATFORM_N64
#pragma increment_block_number "ntsc-1.0:0 ntsc-1.1:0 ntsc-1.2:0 pal-1.0:0 pal-1.1:0"
#include "global.h"
@ -849,5 +847,3 @@ NORETURN void Fault_AddHungupAndCrash(const char* file, int line) {
sprintf(msg, "HungUp %s:%d", file, line);
Fault_AddHungupAndCrashImpl(msg, NULL);
}
#endif

12
src/code/game.c
View file

@ -391,7 +391,7 @@ void GameState_InitArena(GameState* gameState, size_t size) {
} else {
THA_Init(&gameState->tha, NULL, 0);
PRINTF(T("ハイラル確保失敗\n", "Failure to secure Hyrule\n"));
HUNGUP_AND_CRASH("../game.c", LN4(895, 898, 985, 999));
HUNGUP_AND_CRASH("../game.c", LN4(895, 898, 985, 999, 999));
}
}
@ -409,12 +409,12 @@ void GameState_Realloc(GameState* gameState, size_t size) {
SystemArena_GetSizes(&systemMaxFree, &systemFree, &systemAlloc);
if ((systemMaxFree - 0x10) < size) {
PRINTF("%c", BEL);
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("メモリが足りません。ハイラルサイズを可能な最大値に変更します\n",
"Not enough memory. Change Hyrule size to maximum possible value\n"));
PRINTF("(hyral=%08x max=%08x free=%08x alloc=%08x)\n", size, systemMaxFree, systemFree, systemAlloc);
PRINTF(VT_RST);
PRINTF_RST();
size = systemMaxFree - 0x10;
}
@ -432,7 +432,7 @@ void GameState_Realloc(GameState* gameState, size_t size) {
SystemArena_Display();
#endif
HUNGUP_AND_CRASH("../game.c", LN4(940, 943, 1030, 1044));
HUNGUP_AND_CRASH("../game.c", LN4(940, 943, 1030, 1044, 1044));
}
}
@ -557,9 +557,9 @@ void* GameState_Alloc(GameState* gameState, size_t size, const char* file, int l
}
}
if (ret != NULL) {
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF("game_alloc(%08x) %08x-%08x [%s:%d]\n", size, ret, (uintptr_t)ret + size, file, line);
PRINTF(VT_RST);
PRINTF_RST();
}
return ret;
}

10
src/code/graph.c
View file

@ -188,9 +188,9 @@ void Graph_TaskSet00(GraphicsContext* gfxCtx) {
if (msg == (OSMesg)666) {
#if DEBUG_FEATURES
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("RCPが帰ってきませんでした。", "RCP did not return."));
PRINTF(VT_RST);
PRINTF_RST();
LogUtils_LogHexDump((void*)PHYS_TO_K1(SP_BASE_REG), 0x20);
LogUtils_LogHexDump((void*)PHYS_TO_K1(DPC_BASE_REG), 0x20);
@ -380,7 +380,7 @@ void Graph_Update(GraphicsContext* gfxCtx, GameState* gameState) {
PRINTF("%c", BEL);
PRINTF(VT_COL(RED, WHITE) T("ダイナミック領域先頭が破壊されています\n", "Dynamic area head is destroyed\n")
VT_RST);
Fault_AddHungupAndCrash("../graph.c", LN4(937, 940, 951, 1070));
Fault_AddHungupAndCrash("../graph.c", LN4(937, 940, 951, 1067, 1070));
}
if (pool->tailMagic != GFXPOOL_TAIL_MAGIC) {
@ -388,7 +388,7 @@ void Graph_Update(GraphicsContext* gfxCtx, GameState* gameState) {
PRINTF("%c", BEL);
PRINTF(VT_COL(RED, WHITE)
T("ダイナミック領域末尾が破壊されています\n", "Dynamic region tail is destroyed\n") VT_RST);
Fault_AddHungupAndCrash("../graph.c", LN4(943, 946, 957, 1076));
Fault_AddHungupAndCrash("../graph.c", LN4(943, 946, 957, 1073, 1076));
}
}
@ -481,7 +481,7 @@ void Graph_ThreadEntry(void* arg0) {
sprintf(faultMsg, "CLASS SIZE= %d bytes", size);
Fault_AddHungupAndCrashImpl("GAME CLASS MALLOC FAILED", faultMsg);
#else
Fault_AddHungupAndCrash("../graph.c", LN4(1067, 1070, 1081, 1200));
Fault_AddHungupAndCrash("../graph.c", LN4(1067, 1070, 1081, 1197, 1200));
#endif
}

4
src/code/irqmgr.c
View file

@ -185,11 +185,11 @@ void IrqMgr_CheckStacks(void) {
PRINTF(T("スタックは大丈夫みたいです\n", "The stack looks ok\n"));
} else {
PRINTF("%c", BEL);
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("スタックがオーバーフローしたか危険な状態です\n", "Stack overflow or dangerous\n"));
PRINTF(T("早々にスタックサイズを増やすか、スタックを消費しないようにしてください\n",
"Increase stack size early or don't consume stack\n"));
PRINTF(VT_RST);
PRINTF_RST();
}
}

125
src/code/kanread.s
View file

@ -1,11 +1,7 @@
#include "ultra64/asm.h"
#include "ultra64/regdef.h"
.set noat
.set noreorder
.section .text
.balign 16
.text
/**
* s32 Kanji_OffsetFromShiftJIS(s32 sjis);
@ -26,64 +22,57 @@
* @remark Almost identical to "LeoGetKadr" from libleo.
*/
LEAF(Kanji_OffsetFromShiftJIS)
// Characters with codepoints >= 0x8800 are kanji. Arrangement is regular,
// so convert index directly.
li $at, 0x8800
slt $at, $a0, $at
bnez $at, .nonkanji
// 0xBC is number of glyphs in one block in the `kanji` file:
// 0x100 possible codepoints with the same byte1
// - 0x40 unused at beginning
// - 1 unused at 0x7F
// - 3 unused at 0xFD, 0xFE, 0xFF
li $a2, 0xBC
// Get byte1 and adjust so starts at 0
srl $a1, $a0, 8
addi $a1, $a1, -0x88
multu $a2, $a1
// Get byte2 and adjust so starts at 0
andi $a3, $a0, 0xFF
addi $a3, $a3, -0x40
slti $at, $a3, (0x80 - 0x40)
mflo $a2
// 0x__7F is always empty and elided in the file, so decrement if larger
bnezl $at, .kanji_lower_halfblock
mflo $a2
addi $a3, $a3, -1
mflo $a2
.kanji_lower_halfblock:
addi $a3, $a3, 0x30A
add $a3, $a3, $a2
jr $ra
sll $v0, $a3, 7
// returns (0x30A + (adjusted byte2) + (adjusted byte1) * 0xBC) * FONT_CHAR_TEX_SIZE
/* Characters with codepoints >= 0x8800 are kanji. Arrangement is regular, */
/* so convert index directly. */
li a2, 0xBC
blt a0, 0x8800, .nonkanji
/* 0xBC is number of glyphs in one block in the `kanji` file: */
/* 0x100 possible codepoints with the same byte1 */
/* - 0x40 unused at beginning */
/* - 1 unused at 0x7F */
/* - 3 unused at 0xFD, 0xFE, 0xFF */
/* Get byte1 and adjust so starts at 0 */
srl a1, a0, 8
addi a1, a1, -0x88
/* Get byte2 and adjust so starts at 0 */
andi a3, a0, 0xFF
addi a3, a3, -0x40
mul a2, a2, a1
blt a3, 0x40, .kanji_lower_halfblock
// Non-kanji are arranged with irregular gaps, use the lookup table.
/* 0x__7F is always empty and elided in the file, so decrement if larger */
addi a3, a3, -1
.kanji_lower_halfblock:
mflo a2 /* Unncessary mflo: the pseudo-op `mul` already performs mflo */
addi a3, a3, 0x30A
add a3, a3, a2
/* returns (0x30A + (adjusted byte2) + (adjusted byte1) * 0xBC) * FONT_CHAR_TEX_SIZE */
sll v0, a3, 7
jr ra
/* Non-kanji are arranged with irregular gaps, use the lookup table. */
.nonkanji:
// Get byte1 and adjust so starts at 0
srl $a1, $a0, 8
addi $a1, $a1, -0x81
multu $a2, $a1
// Get byte2 and adjust so starts at 0
andi $a3, $a0, 0xFF
addi $a3, $a3, -0x40
slti $at, $a3, (0x80 - 0x40)
mflo $a2
// 0x__7F is always empty and elided in the file, so decrement if larger
bnezl $at, .nonkanji_lower_halfblock
mflo $a2
addi $a3, $a3, -1
mflo $a2
/* Get byte1 and adjust so starts at 0 */
srl a1, a0, 8
addi a1, a1, -0x81
/* Get byte2 and adjust so starts at 0 */
andi a3, a0, 0xFF
addi a3, a3, -0x40
mul a2, a2, a1
blt a3, 0x40, .nonkanji_lower_halfblock
/* 0x__7F is always empty and elided in the file, so decrement if larger */
addi a3, a3, -1
.nonkanji_lower_halfblock:
add $a3, $a3, $a2
lui $a2, %hi(sNonKanjiIndices)
sll $a3, $a3, 1
addiu $a2, %lo(sNonKanjiIndices)
add $a3, $a3, $a2
lh $a2, ($a3)
jr $ra
sll $v0, $a2, 7
// returns sNonKanjiIndices[(adjusted byte2) + (adjusted byte1) * 0xBC] * FONT_CHAR_TEX_SIZE
mflo a2 /* Unncessary mflo: the pseudo-op `mul` already performs mflo */
add a3, a3, a2
sll a3, a3, 1
la a2, sNonKanjiIndices
add a3, a3, a2
lh a2, (a3)
/* returns sNonKanjiIndices[(adjusted byte2) + (adjusted byte1) * 0xBC] * FONT_CHAR_TEX_SIZE */
sll v0, a2, 7
jr ra
END(Kanji_OffsetFromShiftJIS)
/**
@ -116,7 +105,7 @@ END(Kanji_OffsetFromShiftJIS)
* into blocks by high byte.
*/
DATA(sNonKanjiIndices)
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
/* 0x814_ */ .half 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008, 0x0009, 0x000A, 0x000B, 0x000C, 0x000D, 0x000E, 0x000F
/* 0x815_ */ .half 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, 0x0018, 0x0019, 0x001A, 0x001B, 0x001C, 0x001D, 0x001E, 0x001F
/* 0x816_ */ .half 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, 0x0028, 0x0029, 0x002A, 0x002B, 0x002C, 0x002D, 0x002E, 0x002F
@ -130,7 +119,7 @@ DATA(sNonKanjiIndices)
/* 0x81E_ */ .half 0x0080, 0x0081, 0x0082, 0x0083, 0x0084, 0x0085, 0x0086, 0x0087, 0x0088, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
/* 0x81F_ */ .half 0x0089, 0x008A, 0x008B, 0x008C, 0x008D, 0x008E, 0x008F, 0x0090, 0x0000, 0x0000, 0x0000, 0x0000, 0x0091
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
/* 0x824_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0092
/* 0x825_ */ .half 0x0093, 0x0094, 0x0095, 0x0096, 0x0097, 0x0098, 0x0099, 0x009A, 0x009B, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
/* 0x826_ */ .half 0x009C, 0x009D, 0x009E, 0x009F, 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, 0x00A8, 0x00A9, 0x00AA, 0x00AB
@ -144,7 +133,7 @@ DATA(sNonKanjiIndices)
/* 0x82E_ */ .half 0x0111, 0x0112, 0x0113, 0x0114, 0x0115, 0x0116, 0x0117, 0x0118, 0x0119, 0x011A, 0x011B, 0x011C, 0x011D, 0x011E, 0x011F, 0x0120
/* 0x82F_ */ .half 0x0121, 0x0122, 0x0123, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
/* 0x834_ */ .half 0x0124, 0x0125, 0x0126, 0x0127, 0x0128, 0x0129, 0x012A, 0x012B, 0x012C, 0x012D, 0x012E, 0x012F, 0x0130, 0x0131, 0x0132, 0x0133
/* 0x835_ */ .half 0x0134, 0x0135, 0x0136, 0x0137, 0x0138, 0x0139, 0x013A, 0x013B, 0x013C, 0x013D, 0x013E, 0x013F, 0x0140, 0x0141, 0x0142, 0x0143
/* 0x836_ */ .half 0x0144, 0x0145, 0x0146, 0x0147, 0x0148, 0x0149, 0x014A, 0x014B, 0x014C, 0x014D, 0x014E, 0x014F, 0x0150, 0x0151, 0x0152, 0x0153
@ -158,7 +147,7 @@ DATA(sNonKanjiIndices)
/* 0x83E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
/* 0x83F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
/* 0x844_ */ .half 0x01AB, 0x01AC, 0x01AD, 0x01AE, 0x01AF, 0x01B0, 0x01B1, 0x01B2, 0x01B3, 0x01B4, 0x01B5, 0x01B6, 0x01B7, 0x01B8, 0x01B9, 0x01BA
/* 0x845_ */ .half 0x01BB, 0x01BC, 0x01BD, 0x01BE, 0x01BF, 0x01C0, 0x01C1, 0x01C2, 0x01C3, 0x01C4, 0x01C5, 0x01C6, 0x01C7, 0x01C8, 0x01C9, 0x01CA
/* 0x846_ */ .half 0x01CB, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
@ -172,7 +161,7 @@ DATA(sNonKanjiIndices)
/* 0x84E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
/* 0x84F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
/* 0x854_ */ .half 0x020E, 0x020F, 0x0210, 0x0211, 0x0212, 0x0213, 0x0214, 0x0215, 0x0216, 0x0217, 0x0218, 0x0219, 0x021A, 0x021B, 0x021C, 0x021D
/* 0x855_ */ .half 0x021E, 0x021F, 0x0220, 0x0221, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0222, 0x0223
/* 0x856_ */ .half 0x0224, 0x0225, 0x0226, 0x0227, 0x0228, 0x0229, 0x022A, 0x022B, 0x022C, 0x022D, 0x022E, 0x022F, 0x0230, 0x0231, 0x0232, 0x0233
@ -186,7 +175,7 @@ DATA(sNonKanjiIndices)
/* 0x85E_ */ .half 0x026C, 0x026D, 0x026E, 0x026F, 0x0270, 0x0271, 0x0272, 0x0273, 0x0274, 0x0275, 0x0276, 0x0277, 0x0278, 0x0279, 0x027A, 0x027B
/* 0x85F_ */ .half 0x027C, 0x027D, 0x027E, 0x027F, 0x0280, 0x0281, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
/* 0x864_ */ .half 0x0282, 0x0283, 0x0284, 0x0285, 0x0286, 0x0287, 0x0288, 0x0289, 0x028A, 0x028B, 0x028C, 0x028D, 0x028E, 0x028F, 0x0290, 0x0291
/* 0x865_ */ .half 0x0292, 0x0293, 0x0294, 0x0295, 0x0296, 0x0297, 0x0298, 0x0299, 0x029A, 0x029B, 0x029C, 0x029D, 0x029E, 0x029F, 0x0000, 0x0000
/* 0x866_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
@ -200,7 +189,7 @@ DATA(sNonKanjiIndices)
/* 0x86E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
/* 0x86F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
/* 0x874_ */ .half 0x02C0, 0x02C1, 0x02C2, 0x02C3, 0x02C4, 0x02C5, 0x02C6, 0x02C7, 0x02C8, 0x02C9, 0x02CA, 0x02CB, 0x02CC, 0x02CD, 0x02CE, 0x02CF
/* 0x875_ */ .half 0x02D0, 0x02D1, 0x02D2, 0x02D3, 0x02D4, 0x02D5, 0x02D6, 0x02D7, 0x02D8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
/* 0x876_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000

8
src/code/main.c
View file

@ -23,8 +23,8 @@ extern struct IrqMgr gIrqMgr;
#include "n64dd.h"
#endif
#pragma increment_block_number "gc-eu:160 gc-eu-mq:160 gc-jp:160 gc-jp-ce:160 gc-jp-mq:160 gc-us:160 gc-us-mq:160" \
"ntsc-1.0:141 ntsc-1.1:141 ntsc-1.2:141 pal-1.0:139 pal-1.1:139"
#pragma increment_block_number "gc-eu:144 gc-eu-mq:144 gc-jp:144 gc-jp-ce:144 gc-jp-mq:144 gc-us:144 gc-us-mq:144" \
"ntsc-1.0:130 ntsc-1.1:130 ntsc-1.2:130 pal-1.0:128 pal-1.1:128"
extern u8 _buffersSegmentEnd[];
@ -59,11 +59,11 @@ OSMesg sSerialMsgBuf[1];
#if DEBUG_FEATURES
void Main_LogSystemHeap(void) {
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF(
T("システムヒープサイズ %08x(%dKB) 開始アドレス %08x\n", "System heap size %08x (%dKB) Start address %08x\n"),
gSystemHeapSize, gSystemHeapSize / 1024, _buffersSegmentEnd);
PRINTF(VT_RST);
PRINTF_RST();
}
#endif

6
src/code/padmgr.c
View file

@ -35,9 +35,9 @@
#define PADMGR_LOG(controllerNum, msg) \
if (DEBUG_FEATURES) { \
PRINTF(VT_FGCOL(YELLOW)); \
PRINTF_COLOR_YELLOW(); \
PRINTF(T("padmgr: %dコン: %s\n", "padmgr: Controller %d: %s\n"), (controllerNum) + 1, (msg)); \
PRINTF(VT_RST); \
PRINTF_RST(); \
} \
(void)0
@ -327,7 +327,7 @@ void PadMgr_UpdateInputs(PadMgr* padMgr) {
default:
// Unknown error response
LOG_HEX("padnow1->errno", pad->errno, "../padmgr.c", 396);
Fault_AddHungupAndCrash("../padmgr.c", LN3(379, 382, 397));
Fault_AddHungupAndCrash("../padmgr.c", LN3(379, 382, 397, 397));
break;
}

2
src/code/sched.c
View file

@ -62,6 +62,8 @@ vs32 sSchedDebugPrintfEnabled = false;
PRINTF
#elif IDO_PRINTF_WORKAROUND
#define SCHED_DEBUG_PRINTF(args) (void)0
#elif defined(__GNUC__) && __GNUC__ < 3
#define SCHED_DEBUG_PRINTF(format, args...) (void)0
#else
#define SCHED_DEBUG_PRINTF(format, ...) (void)0
#endif

4
src/code/speed_meter.c
View file

@ -185,9 +185,9 @@ void SpeedMeter_DrawAllocEntry(SpeedMeterAllocEntry* this, GraphicsContext* gfxC
Gfx* gfx;
if (this->maxval == 0) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
LOG_NUM("this->maxval", this->maxval, "../speed_meter.c", 313);
PRINTF(VT_RST);
PRINTF_RST();
} else {
OPEN_DISPS(gfxCtx, "../speed_meter.c", 318);

2
src/code/sys_cfb.c
View file

@ -34,7 +34,7 @@ void SysCfb_Init(s32 n64dd) {
PRINTF("RAM4M mode\n");
sSysCfbEnd = 0x80400000;
} else {
LogUtils_HungupThread("../sys_cfb.c", LN4(305, 308, 322, 354));
LogUtils_HungupThread("../sys_cfb.c", LN4(305, 308, 322, 341, 354));
}
screenSize = SCREEN_WIDTH * SCREEN_HEIGHT;

14
src/code/sys_math3d.c
View file

@ -5,7 +5,7 @@
#include "macros.h"
#include "sys_math3d.h"
#pragma increment_block_number "gc-eu:103 gc-eu-mq:103 gc-jp:103 gc-jp-ce:103 gc-jp-mq:103 gc-us:103 gc-us-mq:103" \
#pragma increment_block_number "gc-eu:99 gc-eu-mq:99 gc-jp:99 gc-jp-ce:99 gc-jp-mq:99 gc-us:99 gc-us-mq:99" \
"ntsc-1.0:80 ntsc-1.1:80 ntsc-1.2:79 pal-1.0:80 pal-1.1:80"
s32 Math3D_LineVsLineClosestTwoPoints(Vec3f* lineAPointA, Vec3f* lineAPointB, Vec3f* lineBPointA, Vec3f* lineBPointB,
@ -127,11 +127,11 @@ void Math3D_LineClosestToPoint(InfiniteLine* line, Vec3f* pos, Vec3f* closestPoi
dirVectorLengthSq = Math3D_Vec3fMagnitudeSq(&line->dir);
if (IS_ZERO(dirVectorLengthSq)) {
PRINTF(VT_COL(YELLOW, BLACK));
PRINTF_COLOR_WARNING();
PRINTF(T("Math3D_lineVsPosSuisenCross():直線の長さがありません\n",
"Math3D_lineVsPosSuisenCross(): No straight line length\n"));
PRINTF(T("cross = pos を返します。\n", "Returns cross = pos.\n"));
PRINTF(VT_RST);
PRINTF_RST();
Math_Vec3f_Copy(closestPoint, pos);
//! @bug Missing early return
}
@ -930,11 +930,11 @@ f32 Math3D_Plane(Plane* plane, Vec3f* pointOnPlane) {
*/
f32 Math3D_UDistPlaneToPos(f32 nx, f32 ny, f32 nz, f32 originDist, Vec3f* p) {
if (DEBUG_FEATURES && IS_ZERO(sqrtf(SQ(nx) + SQ(ny) + SQ(nz)))) {
PRINTF(VT_COL(YELLOW, BLACK));
PRINTF_COLOR_WARNING();
PRINTF(T("Math3DLengthPlaneAndPos():法線size がゼロ近いです%f %f %f\n",
"Math3DLengthPlaneAndPos(): Normal size is near zero %f %f %f\n"),
nx, ny, nz);
PRINTF(VT_RST);
PRINTF_RST();
return 0.0f;
}
return fabsf(Math3D_DistPlaneToPos(nx, ny, nz, originDist, p));
@ -949,11 +949,11 @@ f32 Math3D_DistPlaneToPos(f32 nx, f32 ny, f32 nz, f32 originDist, Vec3f* p) {
normMagnitude = sqrtf(SQ(nx) + SQ(ny) + SQ(nz));
if (IS_ZERO(normMagnitude)) {
PRINTF(VT_COL(YELLOW, BLACK));
PRINTF_COLOR_WARNING();
PRINTF(T("Math3DSignedLengthPlaneAndPos():法線size がゼロ近いです%f %f %f\n",
"Math3DSignedLengthPlaneAndPos(): Normal size is close to zero %f %f %f\n"),
nx, ny, nz);
PRINTF(VT_RST);
PRINTF_RST();
return 0.0f;
}
return Math3D_Planef(nx, ny, nz, originDist, p) / normMagnitude;

4
src/code/z_DLF.c
View file

@ -18,12 +18,12 @@ void Overlay_LoadGameState(GameStateOverlay* overlayEntry) {
return;
}
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF("OVL(d):Seg:%08x-%08x Ram:%08x-%08x Off:%08x %s\n", overlayEntry->vramStart, overlayEntry->vramEnd,
overlayEntry->loadedRamAddr,
(u32)overlayEntry->loadedRamAddr + (u32)overlayEntry->vramEnd - (u32)overlayEntry->vramStart,
(u32)overlayEntry->vramStart - (u32)overlayEntry->loadedRamAddr, "");
PRINTF(VT_RST);
PRINTF_RST();
if (overlayEntry->unk_14 != NULL) {
overlayEntry->unk_14 = (void*)((u32)overlayEntry->unk_14 -

10
src/code/z_actor.c
View file

@ -24,6 +24,8 @@ static s32 sCurCeilingBgId;
PRINTF
#elif IDO_PRINTF_WORKAROUND
#define ACTOR_DEBUG_PRINTF(args) (void)0
#elif defined(__GNUC__) && __GNUC__ < 3
#define ACTOR_DEBUG_PRINTF(format, args...) (void)0
#else
#define ACTOR_DEBUG_PRINTF(format, ...) (void)0
#endif
@ -3055,7 +3057,7 @@ Actor* Actor_RemoveFromCategory(PlayState* play, ActorContext* actorCtx, Actor*
}
void Actor_FreeOverlay(ActorOverlay* actorOverlay) {
PRINTF(VT_FGCOL(CYAN));
PRINTF_COLOR_CYAN();
if (actorOverlay->numLoaded == 0) {
ACTOR_DEBUG_PRINTF(T("アクタークライアントが０になりました\n", "Actor clients are now 0\n"));
@ -3078,7 +3080,7 @@ void Actor_FreeOverlay(ActorOverlay* actorOverlay) {
actorOverlay->numLoaded);
}
PRINTF(VT_RST);
PRINTF_RST();
}
Actor* Actor_Spawn(ActorContext* actorCtx, PlayState* play, s16 actorId, f32 posX, f32 posY, f32 posZ, s16 rotX,
@ -3144,13 +3146,13 @@ Actor* Actor_Spawn(ActorContext* actorCtx, PlayState* play, s16 actorId, f32 pos
Overlay_Load(overlayEntry->file.vromStart, overlayEntry->file.vromEnd, overlayEntry->vramStart,
overlayEntry->vramEnd, overlayEntry->loadedRamAddr);
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF("OVL(a):Seg:%08x-%08x Ram:%08x-%08x Off:%08x %s\n", overlayEntry->vramStart, overlayEntry->vramEnd,
overlayEntry->loadedRamAddr,
(uintptr_t)overlayEntry->loadedRamAddr + (uintptr_t)overlayEntry->vramEnd -
(uintptr_t)overlayEntry->vramStart,
(uintptr_t)overlayEntry->vramStart - (uintptr_t)overlayEntry->loadedRamAddr, name);
PRINTF(VT_RST);
PRINTF_RST();
overlayEntry->numLoaded = 0;
}

4
src/code/z_bg_collect.c
View file

@ -40,14 +40,14 @@ void DynaPolyActor_UpdateCarriedActorPos(CollisionContext* colCtx, s32 bgId, Act
if (BGCHECK_XYZ_ABSMAX <= pos.x || pos.x <= -BGCHECK_XYZ_ABSMAX || BGCHECK_XYZ_ABSMAX <= pos.y ||
pos.y <= -BGCHECK_XYZ_ABSMAX || BGCHECK_XYZ_ABSMAX <= pos.z || pos.z <= -BGCHECK_XYZ_ABSMAX) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
//! @bug file and line are not passed to PRINTF
PRINTF(T("BGCheckCollection_typicalActorPos():位置が妥当ではありません。\n"
"pos (%f,%f,%f) file:%s line:%d\n",
"BGCheckCollection_typicalActorPos(): Position is not valid. \n"
"pos (%f,%f,%f) file:%s line:%d\n"),
pos.x, pos.y, pos.z);
PRINTF(VT_RST);
PRINTF_RST();
}
#endif
}

50
src/code/z_bgcheck.c
View file

@ -2,7 +2,7 @@
#include "terminal.h"
#include "line_numbers.h"
#pragma increment_block_number "ntsc-1.0:128 ntsc-1.1:128 ntsc-1.2:128"
#pragma increment_block_number "ntsc-1.0:112 ntsc-1.1:112 ntsc-1.2:112"
u16 DynaSSNodeList_GetNextNodeIdx(DynaSSNodeList* nodeList);
void BgCheck_GetStaticLookupIndicesFromPos(CollisionContext* colCtx, Vec3f* pos, Vec3i* sector);
@ -89,11 +89,11 @@ u16 sSurfaceMaterialToSfxOffset[SURFACE_MATERIAL_MAX] = {
s32 BgCheck_PosErrorCheck(Vec3f* pos, const char* file, int line) {
if (pos->x >= BGCHECK_XYZ_ABSMAX || pos->x <= -BGCHECK_XYZ_ABSMAX || pos->y >= BGCHECK_XYZ_ABSMAX ||
pos->y <= -BGCHECK_XYZ_ABSMAX || pos->z >= BGCHECK_XYZ_ABSMAX || pos->z <= -BGCHECK_XYZ_ABSMAX) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("T_BGCheck_PosErrorCheck():位置が妥当ではありません。pos (%f,%f,%f) file:%s line:%d\n",
"T_BGCheck_PosErrorCheck(): Position is invalid. pos (%f,%f,%f) file:%s line:%d\n"),
pos->x, pos->y, pos->z, file, line);
PRINTF(VT_RST);
PRINTF_RST();
return true;
}
return false;
@ -307,11 +307,11 @@ void CollisionPoly_GetVerticesByBgId(CollisionPoly* poly, s32 bgId, CollisionCon
Vec3s* vtxList;
if (poly == NULL || bgId > BG_ACTOR_MAX || dest == NULL) {
PRINTF(VT_COL(RED, WHITE));
PRINTF_COLOR_ERROR();
PRINTF(T("T_Polygon_GetVertex_bg_ai(): Error %d %d %d 引数が適切ではありません。処理を終了します。\n",
"T_Polygon_GetVertex_bg_ai(): Error %d %d %d Argument not appropriate. Processing terminated.\n"),
poly == NULL, bgId > BG_ACTOR_MAX, dest == NULL);
PRINTF(VT_RST);
PRINTF_RST();
if (dest != NULL) {
//! @bug: dest[2] x and y are not set to 0
@ -1648,10 +1648,10 @@ void BgCheck_Allocate(CollisionContext* colCtx, PlayState* play, CollisionHeader
SSNodeList_Alloc(play, &colCtx->polyNodes, tblMax, colCtx->colHeader->numPolygons);
lookupTblMemSize = BgCheck_InitializeStaticLookup(colCtx, play, colCtx->lookupTbl);
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF(T("/*---結局 BG使用サイズ %dbyte---*/\n", "/*---BG size used in the end %dbyte---*/\n"),
memSize + lookupTblMemSize);
PRINTF(VT_RST);
PRINTF_RST();
DynaPoly_Init(play, &colCtx->dyna);
DynaPoly_Alloc(play, &colCtx->dyna);
@ -1669,10 +1669,10 @@ CollisionHeader* BgCheck_GetCollisionHeader(CollisionContext* colCtx, s32 bgId)
return NULL;
}
if (!(colCtx->dyna.bgActorFlags[bgId] & BGACTOR_IN_USE)) {
PRINTF(VT_COL(YELLOW, BLACK));
PRINTF_COLOR_WARNING();
PRINTF(T("T_BGCheck_getBGDataInfo():そのbg_actor_indexは使われておりません。index=%d\n",
"T_BGCheck_getBGDataInfo(): That bg_actor_index is not in use. index=%d\n"));
PRINTF(VT_RST);
PRINTF_RST();
return NULL;
}
return colCtx->dyna.bgActors[bgId].colHeader;
@ -2738,10 +2738,10 @@ s32 DynaPoly_SetBgActor(PlayState* play, DynaCollisionContext* dyna, Actor* acto
}
if (!foundSlot) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("DynaPolyInfo_setActor():ダイナミックポリゴン 空きインデックスはありません\n",
"DynaPolyInfo_setActor(): Dynamic polygon no free indexes\n"));
PRINTF(VT_RST);
PRINTF_RST();
return BG_ACTOR_MAX;
}
@ -2749,9 +2749,9 @@ s32 DynaPoly_SetBgActor(PlayState* play, DynaCollisionContext* dyna, Actor* acto
dyna->bitFlag |= DYNAPOLY_INVALIDATE_LOOKUP;
dyna->bgActorFlags[bgId] &= ~BGACTOR_1;
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF("DynaPolyInfo_setActor():index %d\n", bgId);
PRINTF(VT_RST);
PRINTF_RST();
return bgId;
}
@ -2801,27 +2801,27 @@ void DynaPoly_EnableCeilingCollision(PlayState* play, DynaCollisionContext* dyna
void DynaPoly_DeleteBgActor(PlayState* play, DynaCollisionContext* dyna, s32 bgId) {
DynaPolyActor* actor;
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF("DynaPolyInfo_delReserve():index %d\n", bgId);
PRINTF(VT_RST);
PRINTF_RST();
if (!DynaPoly_IsBgIdBgActor(bgId)) {
#if DEBUG_FEATURES
if (bgId == -1) {
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF(T("DynaPolyInfo_delReserve():削除されているはずの(?)\n"
"インデックス(== -1)のため,処理を中止します。\n",
"DynaPolyInfo_delReserve():The index that should have been deleted(?)\n"
" was(== -1), processing aborted.\n"));
PRINTF(VT_RST);
PRINTF_RST();
} else {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("DynaPolyInfo_delReserve():"
"確保していない／出来なかったインデックスの解放のため、処理を中止します。index == %d\n",
"DynaPolyInfo_delReserve():"
" Unable to deallocate index / index unallocated, processing aborted. index == %d\n"),
bgId);
PRINTF(VT_RST);
PRINTF_RST();
}
#endif
@ -2880,14 +2880,14 @@ void DynaPoly_AddBgActorToLookup(PlayState* play, DynaCollisionContext* dyna, s3
#if DEBUG_FEATURES
if (!(dyna->polyListMax >= *polyStartIndex + pbgdata->numPolygons)) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("DynaPolyInfo_expandSRT():polygon over %dが%dを越えるとダメ\n",
"DynaPolyInfo_expandSRT():polygon over do not use if %d exceeds %d\n"),
*polyStartIndex + pbgdata->numPolygons, dyna->polyListMax);
}
if (!(dyna->vtxListMax >= *vtxStartIndex + pbgdata->numVertices)) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("DynaPolyInfo_expandSRT():vertex over %dが%dを越えるとダメ\n",
"DynaPolyInfo_expandSRT():vertex over do not use if %d exceeds %d\n"),
*vtxStartIndex + pbgdata->numVertices, dyna->vtxListMax);
@ -3067,9 +3067,9 @@ void DynaPoly_UpdateContext(PlayState* play, DynaCollisionContext* dyna) {
for (i = 0; i < BG_ACTOR_MAX; i++) {
if (dyna->bgActorFlags[i] & BGACTOR_1) {
// Initialize BgActor
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF(T("DynaPolyInfo_setup():削除 index=%d\n", "DynaPolyInfo_setup(): Delete index=%d\n"), i);
PRINTF(VT_RST);
PRINTF_RST();
dyna->bgActorFlags[i] = 0;
BgActor_Initialize(play, &dyna->bgActors[i]);
@ -3077,9 +3077,9 @@ void DynaPoly_UpdateContext(PlayState* play, DynaCollisionContext* dyna) {
}
if (dyna->bgActors[i].actor != NULL && dyna->bgActors[i].actor->update == NULL) {
// Delete BgActor
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF(T("DynaPolyInfo_setup():削除 index=%d\n", "DynaPolyInfo_setup(): Delete index=%d\n"), i);
PRINTF(VT_RST);
PRINTF_RST();
actor = DynaPoly_GetActor(&play->colCtx, i);
if (actor == NULL) {
return;

4
src/code/z_camera.c
View file

@ -4,7 +4,7 @@
#include "terminal.h"
#include "overlays/actors/ovl_En_Horse/z_en_horse.h"
#pragma increment_block_number "gc-eu:192 gc-eu-mq:192 gc-jp:192 gc-jp-ce:192 gc-jp-mq:192 gc-us:192 gc-us-mq:192" \
#pragma increment_block_number "gc-eu:128 gc-eu-mq:128 gc-jp:128 gc-jp-ce:128 gc-jp-mq:128 gc-us:128 gc-us-mq:128" \
"ntsc-1.0:128 ntsc-1.1:128 ntsc-1.2:128 pal-1.0:128 pal-1.1:128"
s16 Camera_RequestSettingImpl(Camera* camera, s16 requestedSetting, s16 flags);
@ -3639,7 +3639,7 @@ s32 Camera_KeepOn3(Camera* camera) {
}
#pragma increment_block_number "gc-eu:128 gc-eu-mq:128 gc-jp:128 gc-jp-ce:128 gc-jp-mq:128 gc-us:128 gc-us-mq:128" \
"ntsc-1.0:144 ntsc-1.1:144 ntsc-1.2:144 pal-1.0:142 pal-1.1:142"
"ntsc-1.0:133 ntsc-1.1:133 ntsc-1.2:133 pal-1.0:131 pal-1.1:131"
s32 Camera_KeepOn4(Camera* camera) {
static Vec3f D_8015BD50;

20
src/code/z_collision_check.c
View file

@ -367,9 +367,9 @@ s32 Collider_SetJntSphToActor(PlayState* play, ColliderJntSph* dest, ColliderJnt
if (dest->elements == NULL) {
dest->count = 0;
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("ClObjJntSph_set():zelda_malloc()出来ません。\n", "ClObjJntSph_set():zelda_malloc() Can not.\n"));
PRINTF(VT_RST);
PRINTF_RST();
return false;
}
@ -395,9 +395,9 @@ s32 Collider_SetJntSphAllocType1(PlayState* play, ColliderJntSph* dest, Actor* a
if (dest->elements == NULL) {
dest->count = 0;
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("ClObjJntSph_set3():zelda_malloc_出来ません。\n", "ClObjJntSph_set3():zelda_malloc_ Can not.\n"));
PRINTF(VT_RST);
PRINTF_RST();
return false;
}
@ -423,9 +423,9 @@ s32 Collider_SetJntSphAlloc(PlayState* play, ColliderJntSph* dest, Actor* actor,
if (dest->elements == NULL) {
dest->count = 0;
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("ClObjJntSph_set5():zelda_malloc出来ません\n", "ClObjJntSph_set5():zelda_malloc Can not\n"));
PRINTF(VT_RST);
PRINTF_RST();
return false;
}
for (destElem = dest->elements, srcElem = src->elements; destElem < dest->elements + dest->count;
@ -729,9 +729,9 @@ s32 Collider_SetTrisAllocType1(PlayState* play, ColliderTris* dest, Actor* actor
dest->elements = ZELDA_ARENA_MALLOC(dest->count * sizeof(ColliderTrisElement), "../z_collision_check.c", 2156);
if (dest->elements == NULL) {
dest->count = 0;
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("ClObjTris_set3():zelda_malloc()出来ません\n", "ClObjTris_set3():zelda_malloc() Can not\n"));
PRINTF(VT_RST);
PRINTF_RST();
return false;
}
for (destElem = dest->elements, srcElem = src->elements; destElem < dest->elements + dest->count;
@ -755,9 +755,9 @@ s32 Collider_SetTrisAlloc(PlayState* play, ColliderTris* dest, Actor* actor, Col
dest->elements = ZELDA_ARENA_MALLOC(dest->count * sizeof(ColliderTrisElement), "../z_collision_check.c", 2207);
if (dest->elements == NULL) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("ClObjTris_set5():zelda_malloc出来ません\n", "ClObjTris_set5():zelda_malloc Can not\n"));
PRINTF(VT_RST);
PRINTF_RST();
dest->count = 0;
return false;
}

2
src/code/z_common_data.c
View file

@ -3,7 +3,7 @@
#include "versions.h"
#pragma increment_block_number "gc-eu:128 gc-eu-mq:128 gc-jp:128 gc-jp-ce:128 gc-jp-mq:128 gc-us:128 gc-us-mq:128" \
"ntsc-1.0:192 ntsc-1.1:192 ntsc-1.2:192 pal-1.0:192 pal-1.1:192"
"ntsc-1.0:176 ntsc-1.1:176 ntsc-1.2:176 pal-1.0:160 pal-1.1:160"
ALIGNED(16) SaveContext gSaveContext;
u32 D_8015FA88;

4
src/code/z_eff_shield_particle.c
View file

@ -18,10 +18,10 @@ void EffectShieldParticle_Init(void* thisx, void* initParamsx) {
if ((this != NULL) && (initParams != NULL)) {
this->numElements = initParams->numElements;
if (this->numElements > ARRAY_COUNT(this->elements)) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("EffectShieldParticle_ct():パーティクル数がオーバしてます。\n",
"EffectShieldParticle_ct(): Number of particles exceeded.\n"));
PRINTF(VT_RST);
PRINTF_RST();
return;
}

2
src/code/z_eff_ss_dead.c
View file

@ -30,7 +30,7 @@ void func_80026400(PlayState* play, Color_RGBA8* color, s16 arg2, s16 arg3) {
Gfx* displayListHead;
f32 cos;
#if !PLATFORM_N64
#if PLATFORM_GC
if (arg3 == 0) {
return;
}

18
src/code/z_effect_soft_sprite.c
View file

@ -197,7 +197,7 @@ void EffectSs_Spawn(PlayState* play, s32 type, s32 priority, void* initParams) {
overlayEntry->loadedRamAddr = ZELDA_ARENA_MALLOC_R(overlaySize, "../z_effect_soft_sprite.c", 585);
if (overlayEntry->loadedRamAddr == NULL) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("EffectSoftSprite2_makeEffect():zelda_malloc_r()により,%dbyteのメモリ確保ができま\n"
"せん。そのため、プログラムのロードも\n"
"出来ません。ただいま危険な状態です！\n"
@ -207,18 +207,18 @@ void EffectSs_Spawn(PlayState* play, s32 type, s32 priority, void* initParams) {
"cannot be loaded. What a dangerous situation!\n"
"Naturally, effects will not be produced either.\n"),
overlaySize);
PRINTF(VT_RST);
PRINTF_RST();
return;
}
Overlay_Load(overlayEntry->file.vromStart, overlayEntry->file.vromEnd, overlayEntry->vramStart,
overlayEntry->vramEnd, overlayEntry->loadedRamAddr);
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF("EFFECT SS OVL:SegRom %08x %08x, Seg %08x %08x, RamStart %08x, type: %d\n",
overlayEntry->file.vromStart, overlayEntry->file.vromEnd, overlayEntry->vramStart,
overlayEntry->vramEnd, overlayEntry->loadedRamAddr, type);
PRINTF(VT_RST);
PRINTF_RST();
}
profile = (void*)(uintptr_t)((overlayEntry->profile != NULL)
@ -246,14 +246,14 @@ void EffectSs_Spawn(PlayState* play, s32 type, s32 priority, void* initParams) {
sEffectSsInfo.table[index].priority = priority;
if (profile->init(play, index, &sEffectSsInfo.table[index], initParams) == 0) {
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF(T("EffectSoftSprite2_makeEffect():"
"何らかの理由でコンストラクト失敗。コンストラクターがエラーを返しました。"
"エフェクトの追加を中止します。\n",
"EffectSoftSprite2_makeEffect(): "
"Construction failed for some reason. The constructor returned an error. "
"Ceasing effect addition.\n"));
PRINTF(VT_RST);
PRINTF_RST();
EffectSs_Reset(&sEffectSsInfo.table[index]);
}
}
@ -313,7 +313,7 @@ void EffectSs_DrawAll(PlayState* play) {
if ((sEffectSsInfo.table[i].pos.x > 32000.0f) || (sEffectSsInfo.table[i].pos.x < -32000.0f) ||
(sEffectSsInfo.table[i].pos.y > 32000.0f) || (sEffectSsInfo.table[i].pos.y < -32000.0f) ||
(sEffectSsInfo.table[i].pos.z > 32000.0f) || (sEffectSsInfo.table[i].pos.z < -32000.0f)) {
PRINTF(VT_FGCOL(RED));
PRINTF_COLOR_RED();
PRINTF(T("EffectSoftSprite2_disp():位置が領域外のため "
"削除します。エフェクトラベルNo.%d:プログラムの方で対応をお願いします。ここです ==> "
"pos(%f, %f, %f)で、ラベルはz_effect_soft_sprite_dlftbls.declにあります。\n",
@ -322,10 +322,10 @@ void EffectSs_DrawAll(PlayState* play) {
"pos(%f, %f, %f) and the label is in z_effect_soft_sprite_dlftbls.decl.\n"),
sEffectSsInfo.table[i].type, sEffectSsInfo.table[i].pos.x, sEffectSsInfo.table[i].pos.y,
sEffectSsInfo.table[i].pos.z);
PRINTF(VT_FGCOL(GREEN));
PRINTF_COLOR_GREEN();
PRINTF(T("もし、posを別のことに使っている場合相談に応じます。\n",
"If you are using pos for something else, consult me.\n"));
PRINTF(VT_RST);
PRINTF_RST();
EffectSs_Delete(&sEffectSsInfo.table[i]);
} else {

2
src/code/z_en_item00.c
View file

@ -3,7 +3,7 @@
#include "assets/objects/gameplay_keep/gameplay_keep.h"
#include "overlays/effects/ovl_Effect_Ss_Dead_Sound/z_eff_ss_dead_sound.h"
#pragma increment_block_number "gc-eu:0 gc-eu-mq:0 gc-eu-mq-dbg:0 gc-jp:128 gc-jp-ce:128 gc-jp-mq:128 gc-us:128" \
#pragma increment_block_number "gc-eu:128 gc-eu-mq:128 gc-eu-mq-dbg:0 gc-jp:128 gc-jp-ce:128 gc-jp-mq:128 gc-us:128" \
"gc-us-mq:128 ntsc-1.2:128"
#define FLAGS 0

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