On Windows, we don't have the API that Linux provides, which can be used
to query MSRs of particular CPU cores. However, the same behaviour can be
emulated. Say that the driver handle object also stores 'dedicated thread
index'. When you call 'cpu_msr_driver_open()', this index is set to -1,
so further API functions do not force which core should be executing
RDMSR code. I.e. "I don't care on which core I run".
However, if this is non-negative number, the subsequent
functions like cpu_rdmsr() are forced to pass through this core by
using temporary affinity mask.
This function is similar to cpu_msr_driver_open(), but with core number as parameter
For Linux, core number was always 0. To be able to get all core temp/voltage, we need to set the core number.
They have L3 cache, and the detection code incorrectly assumed this is a Xeon
Irwindale variant due to an old and no longer valid classification check.
Correctly handle the XEON_IRWIN subcode and add an entry in the matchtable
to fix Sandy Bridge-E Xeon.
- move the INLINE_ASM_SUPPORTED guards outside the body of exec_cpuid, as
suggested by Genoil;
- copy the asm code of busy_sse_loop to masm-x64.asm. Some fixup was
required, because the microsoft calling convention doesn't expect
xmm6 & xmm7 to be clobbered in functions.
Confirmed that --clock-ic from cpuid_tool works with the resulting library.
dpkg-buildpackage build debian packages
new file: debian/README.Debian
new file: debian/README.source
new file: debian/changelog
new file: debian/compat
new file: debian/control
new file: debian/copyright
new file: debian/docs
new file: debian/libcpuid-dev.install
new file: debian/libcpuid-doc.docs
new file: debian/libcpuid.install
new file: debian/rules
new file: debian/source/format
Signed-off-by: Zhang, Guodong <gdzhang@linx-info.com>
Priously all fields in the matchtable were treated equal in importance.
With this change, the cache size a taken with half the weight in the decision.
Also add detection entries for some more recent Haswells, and the respective
tests. These are an i5 Haswell from a Mac Book Pro, and a i7 Haswel from
Thinkpad T540.
- Detect AVX and AVX2 on both Intel and AMD CPUs
- Detect BMI1 and BMI2 instruction sets (BMI2 is only on Haswell, BMI1 is
also present on Bulldozers).
- Fix tests to reflect changes.
The last change to flags detection caused a bunch of tests to fail.
The reason is that they are bogus, all recent Intel chips don't have
RDTSCP indicated in the test files, whereas they have it in reality.
I figured it will be easier to add "--fix" option to run_tests.py,
rather than fixing each testfile by hand.
This is also extended in the Makefile:
"make test" runs the tests and reports discrepancies.
"make fix-tests" fixes any offending tests. This blindly assumes that
libcpuid is sane.
Previously the detection only tested this AMD CPUs and the table check was
only present in recog_amd.c
Thanks to Andrew Roberts for reporting this issue!
