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99 commits

Author SHA1 Message Date
Xorg
3a346d4d72
Tests: parse subleafs in convert_instlatx64
Also, it adds 0xffffffff when data is not available, so all lines are presents
2020-05-09 22:46:13 +02:00
Xorg
0b05f45e03
Remove all trailling spaces
It is annoying with some text editors
2020-05-09 17:34:07 +02:00
Xorg
8720a71b35
Tests: add Core i5 8250U
Related to X0rg/CPU-X#129
2020-05-09 14:46:59 +02:00
Veselin Georgiev
9d22c61611
Merge pull request #141 from X0rg/master
Fixes for AMD Zen 2 CPUs
2020-05-04 21:35:42 +03:00
Xorg
46e86331bb
tests: remove duplicate addresses in RAW part 2020-05-03 17:12:33 +02:00
Xorg
afbd7ae56d
tests: fix convert_instlatx64 tool 2020-05-03 17:09:54 +02:00
Xorg
848394ee46
Fix L3 cache associativity detection on AMD Zen 2 CPUs 2020-05-03 17:07:43 +02:00
eloaders
5f7f3c26cc DB: Add Threadripper (Castle Peak) 2019-12-31 10:58:20 +01:00
Veselin Georgiev
f6e4e23796 Add Xeon CLX (Cascade lake-based) using data from PR #129
Kudos to Leslie-Fang for providing it!
2019-08-09 11:18:20 +03:00
Veselin Georgiev
96810180a0
Merge pull request #126 from X0rg/master
Fix for Zen 2
2019-07-12 11:20:06 +03:00
Xorg
848354a3f1 Tests: Add more Matisse CPUs 2019-07-11 22:49:08 +02:00
Xorg
bf7f57f519 Fix SSE unit size for Zen 2 CPUs
Related to #125
2019-07-11 22:29:27 +02:00
Veselin Georgiev
ab3bc3defe
Merge pull request #125 from X0rg/master
More test files for AMD Zen CPUs
2019-07-11 08:34:24 +03:00
Xorg
5aedd53624 Add more test files for AMD Zen CPUs
Dumps found on http://instlatx64.atw.hu/
2019-07-07 20:03:45 +02:00
Xorg
081c354d17 DB: Add AMD Ryzen 3000 2019-07-07 19:38:46 +02:00
hygonsoc
9f0012b74b add Hygon Dhyana C86 7seris test file
Signed-off-by: hygonsoc <hygonsoc@gmail.com>
2019-04-13 23:08:41 +08:00
Xorg
3a8343c77c Fix Ryzen core count calculation
Close X0rg/CPU-X#86
2018-11-03 21:30:01 +01:00
Xorg
7358232cc4 DB: Add Kaby Lake-U 2018-09-23 22:06:53 +02:00
Xorg
218015a983 Tests: Add Pentium 4405U 2018-08-08 15:02:08 +02:00
Xorg
9c382e33b3 DB: Add Skylake-X CPUs 2018-08-08 14:51:38 +02:00
Xorg
c2645d0dff Force Python 2.7 in all Python scripts
/usr/bin/python is Python 3.7 on Arch Linux, so it doesn't work
2018-08-08 13:54:14 +02:00
Veselin Georgiev
45d04a9e4a Fix P-III Celeron misdetected as plain P-III (misreport id #8)
Reported via http://libcpuid.sourceforge.net/bugreport.php
The test in particular has no brand string, which was causing the
misdetection (as is the case with a lot of other models, libcpuid
relies on accurate brand string being programmed by the BIOS in
order to do the detection).

The actual CPU was a Pentium-III based Celeron (SL54Q), but it
was detected as "Pentium III (Coppermine)".

A bit of historical trivia: for the related Tualatin models, if
the BIOS doesn't enter a brand string, there might be NO WAY to
tell a regular P-3 and a P-3 Celeron apart: P-3s have variants
with 256KiB and 512KiB L2 cache, while the Celerons are 256 KiB, so
a 256KiB regular P3 is no different than its corresponding Celeron.
Only the FSB is different, but there's no way to detect this via
CPUID.

For the Coppermines its an easier case: Celerons are always 128KiB,
and Pentia are 256KiB, so I've added this distinction in the tables.
2018-05-02 11:05:25 +03:00
anonymous
a9c739d312 virtual machine test 2018-04-21 01:00:30 +00:00
Xorg
f1e1ad58e7 DB: Add Raven Ridge APUs and Threadripper CPUs 2018-03-20 19:52:40 +01:00
Veselin Georgiev
f178de98f3 Fix issue #104: Intel Coffee Lake and Kaby Lake
Add support for detecting Coffee Lake i[357]s. Test included.
Thanks to @X0rg for reporting and to @exdeus for the raw cpu data.

The detection here relies on Kaby and Coffee lakes having different
number of cores for the equivalent brand:

i3: 2 cores in Kaby, 4 in Coffee
i5 and i7: 4 cores in Kaby, 6 in Coffee.
2018-02-04 13:37:36 +02:00
Veselin Georgiev
2f4c21e3a7 Fixed issue #103: Intel Xeon Scalable not recognised "code name".
Table entry added, test added, thanks to @phprus for reporting.
2018-01-28 02:06:37 +02:00
Veselin Georgiev
94507ded22 Fixed issue #86: AMD Ryzen support
Also add a test of Ryzen 7 (1800X).
2017-03-20 02:28:28 +02:00
Xorg
bb4141a25a Enforce Python 2.7 in tests 2017-03-12 09:34:26 +01:00
Veselin Georgiev
86bf8e8269 Fixed issue #81: Misdiagnosis microarchitecture for i3-3220T
It's a mystery to me why this CPU doesn't have RdRand.
A quick-n-dirty workaround is inserted to fix that.
2017-02-10 03:48:00 +02:00
Veselin Georgiev
e36a08deb9 Fixed issue #76: Skylake Core i5 badly recognized
Add support for detecting RDSEED and ADX instructions.
Use RDSEED instead of RTM to ascertain that the CPU is
Broadwell or later in recog_intel.c. This fixes
detection discrepancies on Linux, where RTM is not
made available (I guess there's no kernel support for it).

The two new flags are also now detected in the Broadwell
and Skylake tests. Update them as well.
2016-10-25 05:16:44 +03:00
Veselin Georgiev
3f38efb6c9 Fixed issue #54: Intel Atom N450 not recognised properly
Improved parsing of brand strings for both Pineview and Cedarview
Atoms.

Add tests for both the Pineview Atom, and also Broadwell-E
(forgotten in a previous commit).
2016-08-24 15:06:40 +03:00
Veselin Georgiev
87f3052a7b Add a test with L4 cache (courtesy of @phprus).
The test is a snapshot of a Haswell i7 (a.k.a. "Crystalwell") core.
This is the only test in the test DB right now which has lines for
L4 cache size, associativity and cacheline size different than "-1".

Also update create_test.py to accommodate for the new fields.
2016-07-07 00:53:03 +03:00
Veselin Georgiev
f52c02d394 Update all tests: add fields for L4 cache size, assoc. and line size. 2016-07-07 00:44:45 +03:00
Veselin Georgiev
7b9fe29cef Support for Skylake.
- Detection of hle, rtm, avx512* and sha-ni instructions
- Detection for Skylake
- Add test with Skylake i5
2016-05-19 01:37:45 +03:00
Veselin Georgiev
3a977a4f99 Add detection support for the AMD TBM instructions. Update Vishera test. 2016-05-19 01:37:45 +03:00
wdlkmpx
be254c30ef Add 2 Intel P4 tests / Rename some tests/codenames
Rename some codenames to keep things tidy
2016-05-17 13:08:16 +03:00
wdlkmpx
061bd5986c Ability to display AMD brand code
So that it's easier to test and debug

Also added AMD Champlain mobile
Processor: AMD Athlon(tm) II P320 Dual-Core Processor
2016-05-11 21:21:02 +00:00
wdlkmpx
7aa3155fc5 Add Arrandale mobile
Processor: Intel(R) Pentium(R) CPU        P6100  @ 2.00GHz
2016-05-07 19:43:33 +00:00
wdlkmpx
4047785e97 Recognize Dual Core (Penryn) and more Core2 processors
By adding a new entry to the match table

There's also a new test:
 Intel Pentium Dual-Core Mobile T4500
 Specs:
 http://www.cpu-world.com/CPUs/Pentium_Dual-Core/Intel-Pentium%20Dual-Core%20Mobile%20T4500%20AW80577GG0521MA.html
2016-04-28 00:28:07 +00:00
Veselin Georgiev
db6f3abc9a Merge pull request #34 from wdlkmpx/master
Fix issue with HyperThreading status in old cpus
2016-04-25 01:51:24 +03:00
wdlkmpx
f26c1151f0 Fix issue with HyperThreading status in old cpus
Early P4 processors come with the HT flag, but that feature
is not enabled.

This makes it work the way it should.
2016-04-24 17:28:16 +00:00
wdlkmpx
fa9640b3a2 tests: add p4 celeron willamette-128
1.8GHz
Specs:
http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%201800%20-%20RK80531RC033128%20(BX80531P180G128).html
2016-04-24 17:26:44 +00:00
wdlkmpx
75c3c36cbb tests: add intel p4 prescott with HT enabled
This is from a Pentium 4 Prescott 3.20GHz processor
Specs:
http://www.cpu-world.com/CPUs/Pentium_4/Intel-Pentium%204%203.2%20GHz%20-%20RK80546PG0881M%20(BX80546PG3200E).html
2016-04-24 17:26:03 +00:00
Kurt Cancemi
dea8a6006a Fix tests 2016-04-24 00:27:42 -04:00
wdlkmpx
5f420362c6 P4 Celeron: more precise descriptions
According to wikipedia, cpu-world and some cpu-z screenshots, these processors
do have a code name and it's willamette, northwood, prescott or cedar mill

Signed-off-by: Veselin Georgiev <anrieff@gmail.com>
2016-04-19 00:57:11 +03:00
Veselin Georgiev
13f382725b Fix 'make test' failing without any really wrong tests.
The reason was that the invocation of the cpuid_tool through the makefile
was using LD_LIBRARY_PATH=. to force link&use of the latest-build libcpuid
library. This doesn't seem to work, so using LD_PRELOAD to explicitly load
libcpuid.so into cpuid_tool.

The committed approach of course doesn't work on Mac OS X, where
make test-old should be used.
2016-03-10 02:44:17 +02:00
Kurt Cancemi
c5493f8008 Fix tests 2016-01-16 10:55:08 -05:00
Veselin Georgiev
4e3b633bee Fix tests due to X0rg's codename changes. 2015-09-13 18:38:59 +03:00
Veselin Georgiev
153a6a7c7d Add support for detecting Xeon Ivy Bridge.
Based on report #7 from the sourceforge bugtrack page.
2015-09-03 09:33:38 +03:00
Veselin Georgiev
812b89bcb8 'make test' ported to run on Python 2.5 as well. 2015-04-20 17:22:11 +03:00