Veselin Georgiev
3a977a4f99
Add detection support for the AMD TBM instructions. Update Vishera test.
2016-05-19 01:37:45 +03:00
Veselin Georgiev
1145fdc116
Change signature of cpu_rdmsr: the msr index type changed to uint32.
2016-05-17 17:03:26 +03:00
Veselin Georgiev
f3f92402dc
Remove duplication of data in lists intel_code_t / intel_bcode_str, etc.
2016-05-17 13:28:30 +03:00
wdlkmpx
04c01ad7f9
Show intel detected brand code string
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So that it's easier to test and debug
2016-05-17 13:08:16 +03:00
wdlkmpx
be254c30ef
Add 2 Intel P4 tests / Rename some tests/codenames
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Rename some codenames to keep things tidy
2016-05-17 13:08:16 +03:00
Veselin Georgiev
2b5de90fa7
Merge pull request #41 from wdlkmpx/master
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Ability to display AMD brand code; Add AMD Champlain mobile CPU to the DB.
2016-05-16 03:16:17 +03:00
wdlkmpx
061bd5986c
Ability to display AMD brand code
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So that it's easier to test and debug
Also added AMD Champlain mobile
Processor: AMD Athlon(tm) II P320 Dual-Core Processor
2016-05-11 21:21:02 +00:00
Veselin Georgiev
756ef8c469
Merge pull request #38 from wdlkmpx/master
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Add Arrandale mobile
2016-05-08 16:24:02 +03:00
wdlkmpx
7aa3155fc5
Add Arrandale mobile
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Processor: Intel(R) Pentium(R) CPU P6100 @ 2.00GHz
2016-05-07 19:43:33 +00:00
Veselin Georgiev
f55168b953
Merge pull request #36 from wdlkmpx/master
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Recognize Dual Core (Penryn) and more Core2 processors
2016-04-28 11:01:51 +03:00
wdlkmpx
4047785e97
Recognize Dual Core (Penryn) and more Core2 processors
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By adding a new entry to the match table
There's also a new test:
Intel Pentium Dual-Core Mobile T4500
Specs:
http://www.cpu-world.com/CPUs/Pentium_Dual-Core/Intel-Pentium%20Dual-Core%20Mobile%20T4500%20AW80577GG0521MA.html
2016-04-28 00:28:07 +00:00
Veselin Georgiev
1073370613
Related to pull request #35 : Expose intel brand & model codes.
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The detected intel brand code and model code (arbitrary numbers,
related to the detection algorithm) are printed at verbosiness level
2 or higher. You can see them with `cpuid_tool --all -vv` (if running
on an Intel CPU), or, generally, when decoding Intel CPU data, e.g.
`cpuid_tool --load=tests/intel/nehalem/bloomfield.test --all -vv`.
2016-04-26 16:29:51 +03:00
Veselin Georgiev
db6f3abc9a
Merge pull request #34 from wdlkmpx/master
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Fix issue with HyperThreading status in old cpus
2016-04-25 01:51:24 +03:00
Veselin Georgiev
b1fb7f0d85
Merge pull request #33 from x64architecture/master
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Fix AMD Feature Detection And Associativity Table
2016-04-25 01:46:29 +03:00
wdlkmpx
f26c1151f0
Fix issue with HyperThreading status in old cpus
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Early P4 processors come with the HT flag, but that feature
is not enabled.
This makes it work the way it should.
2016-04-24 17:28:16 +00:00
wdlkmpx
fa9640b3a2
tests: add p4 celeron willamette-128
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1.8GHz
Specs:
http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%201800%20-%20RK80531RC033128%20(BX80531P180G128).html
2016-04-24 17:26:44 +00:00
wdlkmpx
75c3c36cbb
tests: add intel p4 prescott with HT enabled
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This is from a Pentium 4 Prescott 3.20GHz processor
Specs:
http://www.cpu-world.com/CPUs/Pentium_4/Intel-Pentium%204%203.2%20GHz%20-%20RK80546PG0881M%20(BX80546PG3200E).html
2016-04-24 17:26:03 +00:00
Kurt Cancemi
dea8a6006a
Fix tests
2016-04-24 00:27:42 -04:00
Kurt Cancemi
5ca7b2deee
AMD associativity table Dh should contain 96 not 92
2016-04-24 00:26:00 -04:00
Kurt Cancemi
6ea1d4c8e2
Fix PCLMULQDQ, SSE4.1, MOVBE and RDRAND detection on AMD processors
2016-04-24 00:24:31 -04:00
wdlkmpx
eb6f1a2b9a
More precise descriptions for some old processors
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PII Celeron:
Model 5 = Celeron Covington = PII Deschutes
Model 6 = Celeron Mendocino = PII Dixon
PII Xeon:
Model 3 = Xeon ???? = PII Xeon (Klamath)
Model 5 = Xeon Drake = PII Deschutes
Model 6 = Xeon ???? = PII Xeon (Dixon)
PIII Celeron:
PIII Celeron (XX) = PIII (XX)
PIII Xeon:
Model 7 = Xeon Tanner = PIII Katmai
Model 8,10 = Xeon Cascades = PIII Coppermine
Model 11 = Xeon ??? = PIII Xeon (Tualatin)
Signed-off-by: Veselin Georgiev <anrieff@gmail.com>
2016-04-20 01:36:58 +03:00
Veselin Georgiev
b8fe2a57cf
Update Readme.md with details about testing.
2016-04-19 13:38:41 +03:00
Veselin Georgiev
d46ca6eacd
Merge pull request #30 from wdlkmpx/master
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Pentium D: more precise descriptions
2016-04-19 13:20:02 +03:00
wdlkmpx
5f420362c6
P4 Celeron: more precise descriptions
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According to wikipedia, cpu-world and some cpu-z screenshots, these processors
do have a code name and it's willamette, northwood, prescott or cedar mill
Signed-off-by: Veselin Georgiev <anrieff@gmail.com>
2016-04-19 00:57:11 +03:00
wdlkmpx
0dc6edf925
Pentium D: more precise descriptions
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Basically:
Model = 4 -> Smithfield
Model = 6 -> Presler
Download this 16 cpu-z screenshots to verify (1.5mb):
http://s000.tinyupload.com/index.php?file_id=54246820652929080678
2016-04-18 19:29:09 +00:00
Veselin Georgiev
13f382725b
Fix 'make test' failing without any really wrong tests.
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The reason was that the invocation of the cpuid_tool through the makefile
was using LD_LIBRARY_PATH=. to force link&use of the latest-build libcpuid
library. This doesn't seem to work, so using LD_PRELOAD to explicitly load
libcpuid.so into cpuid_tool.
The committed approach of course doesn't work on Mac OS X, where
make test-old should be used.
2016-03-10 02:44:17 +02:00
Veselin Georgiev
281d4720d4
Fix issue #28 : Windows Build error
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msrdriver.c was forgotten from Makefile.am, under the assumption that
autotools are used under *nix only. This is not true, as one could use
MinGW or cygwin.
2016-03-10 01:14:37 +02:00
Veselin Georgiev
d954213667
Speed up "make test" (around 5 times).
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The reason for the apparent slowness was that the "cpuid_tool" that
was being called from run_tests.py is actually a shell script - a
wrapper, installed by libtool. The script was heavy enough to cause
substantial overhead. Just bypassing it (by using the real
cpuid_tool binary) reduced "make test" running time from 4.1 to 0.7s
on my machine.
It is a bit hacky, though, so "make test-old" is retained, which
uses the old invocation.
2016-01-17 03:49:05 +02:00
Veselin Georgiev
76f461de59
Fix "make test" when the builddir != srcdir.
2016-01-17 03:37:23 +02:00
Veselin Georgiev
870c4b72ae
Merge pull request #27 from x64architecture/master
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Fix X2APIC, AES, XSAVE and OSXSAVE feature detection on AMD processors
2016-01-17 03:04:05 +02:00
Kurt Cancemi
c5493f8008
Fix tests
2016-01-16 10:55:08 -05:00
Kurt Cancemi
c694397d33
Fix X2APIC, AES, XSAVE and OSXSAVE feature detection on AMD processors
2016-01-16 10:53:28 -05:00
Veselin Georgiev
78fef29bd6
Merge pull request #26 from X0rg/request
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Recognize more AMD Trinity CPUs
2016-01-03 11:47:13 +02:00
Xorg
c1707401e5
Recognize more AMD Trinity CPUs
2016-01-02 18:45:33 +01:00
Veselin Georgiev
7c52fba506
Fix errors and warnings on Windows (tested using MSVC 2003).
2015-11-30 13:47:40 +02:00
Veselin Georgiev
535ec64dd9
Add ucbench to the users list.
2015-11-04 01:35:06 +02:00
Veselin Georgiev
8b64940a0a
Convert README to markdown.
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The old file is only kept as required by autotools.
2015-11-04 01:31:23 +02:00
Veselin Georgiev
0f679a589f
Update readme, include "users" info as suggested in issue #24 .
2015-11-04 01:31:23 +02:00
Veselin Georgiev
8c7b2fef63
Bump the version to 0.2.2 (and briefly describe changes since 2012).
2015-11-04 01:31:22 +02:00
Veselin Georgiev
9ce5e51cee
Add cpuid_get_vendor() function to exports.
2015-10-17 03:05:45 +03:00
Veselin Georgiev
6b09bceb66
Implement cpu_msr_driver_open_core() on Mac OS X and Windows (dummies).
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On Windows, we don't have the API that Linux provides, which can be used
to query MSRs of particular CPU cores. However, the same behaviour can be
emulated. Say that the driver handle object also stores 'dedicated thread
index'. When you call 'cpu_msr_driver_open()', this index is set to -1,
so further API functions do not force which core should be executing
RDMSR code. I.e. "I don't care on which core I run".
However, if this is non-negative number, the subsequent
functions like cpu_rdmsr() are forced to pass through this core by
using temporary affinity mask.
2015-10-17 03:00:58 +03:00
Veselin Georgiev
3b713ff7a2
Update cpuid_tool to print the new supported MSR info.
2015-10-16 03:07:55 +03:00
Veselin Georgiev
53fe741649
Update errors list; add error messages which had no text description.
2015-10-16 03:07:24 +03:00
Veselin Georgiev
08615d76fe
Merge pull request #22 from X0rg/pull_request
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Some new features for function cpu_msrinfo()
2015-10-16 02:16:35 +03:00
Xorg
d0bb9f1249
Make some functions private
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This commit is to complete commit 7df646a2749f6ef942f9684d66fee14614a74314.
2015-10-15 16:40:16 +02:00
Xorg
b1cff440b7
Remove cpu_vendor() function, replaced by cpuid_get_vendor() function
2015-10-15 16:40:16 +02:00
Xorg
a853fcd25b
Split cpuid_basic_identify() function and add cpuid_get_vendor() function
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These changes are needed to improve cpu_vendor() function. Discussion about these changes come from here (french forum): https://forums.archlinux.fr/viewtopic.php?f=18&t=15973&e=1&view=unread#p147593
The original patch, written by Benjamin ROBIN, is available here: http://pastebin.com/5BHUiCB1
2015-10-15 16:40:16 +02:00
Xorg
32ddb7d734
Improve code readability since recent changes in function cpu_msrinfo()
2015-10-12 15:58:11 +02:00
Xorg
11b51a105c
Implement INFO_TEMPERATURE for Intel in cpu_msrinfo()
2015-10-06 15:39:51 +02:00
Xorg
f11a5b6d16
Modify INFO_MAX_MULTIPLIER for Intel in cpu_msrinfo()
2015-10-06 15:39:51 +02:00