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584 commits

Author SHA1 Message Date
The Tumultuous Unicorn Of Darkness
94930cb891
DB: add AMD Athlon 64 Sherman
Related to TheTumultuousUnicornOfDarkness/CPU-X#255
2022-11-11 16:59:21 +01:00
The Tumultuous Unicorn Of Darkness
cb041797ac
Docs: update Doxyfile for version 1.9.5
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2022-11-11 16:44:09 +01:00
The Tumultuous Unicorn Of Darkness
ac084cc6e9
DB: add more AMD Renoir
Ryzen 7 4800S Desktop Kit
Refer to InstLatx64/InstLatx64@2cdaa4a2ec
https://www.amd.com/en/product/9081
2022-11-11 16:42:09 +01:00
The Tumultuous Unicorn Of Darkness
1977fb7131
DB: add Intel Ice Lake (Xeon-D)
Refer to InstLatx64/InstLatx64@936e7e1c80
2022-11-11 16:32:37 +01:00
The Tumultuous Unicorn Of Darkness
c839e597ae
DB: add AMD Mendocino
Refer to InstLatx64/InstLatx64@936e7e1c80
https://www.anandtech.com/show/17584/amd-launches-mendocino-apus-zen-2-ryzen-and-athlon-7020-series-with-rdna-2-graphics
2022-11-11 16:23:37 +01:00
Xorg
e0dce2b0ef
DB: add Intel Tremont
Fix X0rg/CPU-X#253
2022-10-29 15:41:59 +02:00
Xorg
671174f567
Fix formatting in README.md 2022-10-27 21:17:32 +02:00
Xorg
c61b3b1278
Add packaging status in README.md 2022-10-27 21:15:31 +02:00
Xorg
6c9798c3b0
DB: add Intel Penryn L
Related to #176
https://www.intel.com/content/www/us/en/products/sku/41498/intel-celeron-processor-900-1m-cache-2-20-ghz-800-mhz-fsb/specifications.html
2022-10-25 22:53:16 +02:00
Xorg
1ed9a89ab0
Fix segfault in cpu_identify_all() for mono-core CPUs
Fix X0rg/CPU-X#251
Fix #176
2022-10-25 22:23:14 +02:00
Xorg
9ec39e1312
CI: update actions to Node16
All actions using Node12 are deprecated: https://github.blog/changelog/2022-09-22-github-actions-all-actions-will-begin-running-on-node16-instead-of-node12
2022-10-23 17:26:13 +02:00
Xorg
e5b5f2e019
Release version 0.6.1 2022-10-23 16:51:00 +02:00
Xorg
008983930b
DB: add Intel Raptor Lake-S 2022-10-23 12:11:49 +02:00
Xorg
7cabadd903
CMake: create shared libraries with correct SO name
Fix #174
2022-10-22 21:16:44 +02:00
Xorg
e073118328
Avoid to print the same debug message twice in update_cache_instances() 2022-10-22 20:36:34 +02:00
Xorg
bbdab9e398
Print a warning if APIC ID is not supported 2022-10-22 20:35:56 +02:00
Xorg
737cc3d98e
Use APIC ID to count physical core when supported
Fix #175
2022-10-22 20:32:05 +02:00
Xorg
23b6f5cf54
DB: remove AMD Warhol
It seems Warhol was the codename for 6000 series desktop CPUs, but Warhol was cancelled.
I thought that Warhol was the codename for Ryzen 7 5800X3D, but according to [1], codename for this CPU is Vermeer

[1] https://en.wikipedia.org/wiki/List_of_AMD_Ryzen_processors#Vermeer_and_Chagall_(5000_series_CPUs)
2022-10-11 18:24:08 +02:00
sprunk
8ad16a7050 Fix a typo 2022-10-06 19:48:47 +02:00
Veselin Georgiev
1a3785d03f This would likely fix #172 (cpuid_tool.exe v0.6.0 doesn't work on my PC) 2022-10-05 10:23:58 +03:00
Xorg
f8f73a2eae
Docs: update Doxyfile for version 1.9
warning: Tag 'OUTPUT_TEXT_DIRECTION' at line 102 of file 'libcpuid/build/libcpuid/Doxyfile' has become obsolete.
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warning: Tag 'CLASS_DIAGRAMS' at line 2194 of file 'libcpuid/build/libcpuid/Doxyfile' has become obsolete.
         To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
2022-10-01 18:36:01 +02:00
Xorg
32884eba4b
Move some items in cpudb_amd
It does not change anything, it is to order items by families
2022-10-01 18:27:15 +02:00
Xorg
afd80271bd
DB: add AMD Van Gogh
This APU is used by Steam Deck
2022-10-01 18:07:13 +02:00
Xorg
3524cb5203
DB: add AMD Dali
https://en.wikichip.org/wiki/amd/cores/dali
2022-10-01 18:07:00 +02:00
Xorg
863bf79bc9
DB: add AMD Raphael 2022-10-01 17:36:40 +02:00
Xorg
7a176ff1e4
Allow to debug score
AMD Raphael is detected as Warhol. I found they have the same score because Raphael is stepping 2, despite having a matching ext_model
2022-10-01 17:21:33 +02:00
Xorg
3bf569faf5 Release version 0.6.0 2022-09-27 20:46:59 +02:00
Xorg
7ab6b3273c
DB: add AMD custom APU for Steam Deck
Fix X0rg/CPU-X#236
2022-09-27 20:19:12 +02:00
Xorg
9334bce205
Fix cpuid_deserialize_raw_data_internal when raw starts with 'version' 2022-09-27 20:16:05 +02:00
Xorg
951c42be82
Improve msr_serialize_raw_data function
- Use cached CPUID
- Cache CPU clock
- Make all output fields parsable
2022-09-25 10:33:36 +02:00
Xorg
967f3ab80d
Improve get_cached_cpuid in case of failure 2022-09-25 10:31:54 +02:00
Xorg
73c33ced4a
Add get_error function for internal use
Sometimes, the _libcpuid_errno value needs to be returned
2022-09-25 10:22:22 +02:00
Xorg
10b4e46179
Fix typo in variable name 2022-09-25 10:11:39 +02:00
Xorg
871840f8e5
Fix cpuid_serialize_raw_data_internal when no filename is provided 2022-09-24 18:57:35 +02:00
Xorg
49cb8703ca
Typo (RAW to raw) 2022-09-23 18:44:38 +02:00
Xorg
dc406c4de1
Do not print the same message twice when reading a raw CPUID dump 2022-09-23 18:44:11 +02:00
Xorg
3ed66b7613
Treat others CPU packages as different CPU types
If a RAW dump is containing for instance 256 logical CPUs (2 sockets with 64 cores and SMT), they should not be considered as a 128 cores CPU with SMT.
2022-09-22 21:50:08 +02:00
Xorg
1a0eb95d02
DB: add more AMD Kabini 2022-09-22 20:54:25 +02:00
Xorg
f23a2e3a41
DB: add AMD Steppe Eagle 2022-09-22 20:46:36 +02:00
Xorg
e591e52245
DB: add AMD Beema 2022-09-22 20:46:23 +02:00
Xorg
a3b9b7a798
DB: add AMD Abu Dhabi 2022-09-22 20:27:08 +02:00
Xorg
401a56e4cb
DB: add AMD Interlagos 2022-09-22 20:26:55 +02:00
Xorg
ee97ed213a
DB: rename AMD Bulldozer to Zambezi 2022-09-22 20:17:33 +02:00
Xorg
15d79452f7
DB: fix entry for Godavari x2 2022-09-22 20:10:52 +02:00
Xorg
a98817b804
DB: add AMD Bald Eagle 2022-09-22 20:10:36 +02:00
Xorg
5b8d89a37d
Tests: replace converted RAW dumps from instlatx64 to AIDA64 format
Since 2b8023f733 and 6b742be8cb, it makes sense to update these tests to add:
- RAW CPUID for all CPU cores
- Number of caches instances
2022-09-22 19:36:48 +02:00
Xorg
6b742be8cb Add cache instances field in cpu_id_t and system_id_t 2022-09-22 17:49:38 +02:00
Xorg
0c9ef3249c Decode deterministic cache info for AMD CPUs too
Since Zen-based CPUs, cpu_id_t::l3_cache is the size of the total L3 cache for the whole chip, while cpu_id_t::l1_cache and cpu_id_t::l2_cache are size for each instances.
This change provide L3 cache size per instance.
2022-09-22 17:49:38 +02:00
Umio Yasuno
2ec692b579 Fix null pointer dereference in cpuid_deserialize_raw_data_internal 2022-09-20 18:34:46 +02:00
Xorg
b1732e4785
Tests: minor fixes
Since ff5aafb5f4, xeon-scalable-4114.test and qemu.test are failling because RAW came from a VM.
Since 2b8023f733, godavari-x4.test is failling due to the merge after 9710e7c0ba
2022-09-20 06:58:32 +02:00