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19 commits

Author SHA1 Message Date
Xorg
afd80271bd
DB: add AMD Van Gogh
This APU is used by Steam Deck
2022-10-01 18:07:13 +02:00
Xorg
7ab6b3273c
DB: add AMD custom APU for Steam Deck
Fix X0rg/CPU-X#236
2022-09-27 20:19:12 +02:00
Xorg
3ed66b7613
Treat others CPU packages as different CPU types
If a RAW dump is containing for instance 256 logical CPUs (2 sockets with 64 cores and SMT), they should not be considered as a 128 cores CPU with SMT.
2022-09-22 21:50:08 +02:00
Xorg
5b8d89a37d
Tests: replace converted RAW dumps from instlatx64 to AIDA64 format
Since 2b8023f733 and 6b742be8cb, it makes sense to update these tests to add:
- RAW CPUID for all CPU cores
- Number of caches instances
2022-09-22 19:36:48 +02:00
Xorg
6b742be8cb Add cache instances field in cpu_id_t and system_id_t 2022-09-22 17:49:38 +02:00
Xorg
0c9ef3249c Decode deterministic cache info for AMD CPUs too
Since Zen-based CPUs, cpu_id_t::l3_cache is the size of the total L3 cache for the whole chip, while cpu_id_t::l1_cache and cpu_id_t::l2_cache are size for each instances.
This change provide L3 cache size per instance.
2022-09-22 17:49:38 +02:00
Xorg
2b8023f733
Support for hybrid CPU (#166)
* Set CMAKE_C_FLAGS_DEBUG to display warnings during build

CI workflows are reporting warnings. Adding more C flags here help to avoid that.

* Add new types

* Add set_cpu_affinity function

* Add cpu_identify_all function

* Add cpu_request_core_type function

* Add cpuid_get_all_raw_data, cpuid_serialize_all_raw_data and cpuid_deserialize_all_raw_data functions

* Detect hybrid architecture for Intel CPUs

* Update cpuid_tool to detect all CPU logical cores

* Rename tests subdirectories for Intel Core

* Update all tests

Since e4309a6c4bc3ad875711a1599cba01a205b3103e, new fields are reported by cpuid_tool

* Add Intel Alder Lake

Fix #157

* Remove convert_instlatx64.c

This tool is not useful anymore because the cpuid_deserialize_raw_data_internal() function can natively parse them since 5667e1401c

* Fix affinity_mask computation

* Define _GNU_SOURCE in configure.ac

Forgotten in 4f80964db5

* Use dynamic raw array in cpu_raw_data_array_t

* Add cpu_affinity_mask_t type

* Improve set_cpu_affinity function

- Print a warning if logical CPU number is not supported on operating system
- Return a boolean value in case of success instead of an integer

* Improve cpu_identify_all and cpu_request_core_type functions

* Use dynamic array for cpu_types in system_id_t

This commit also adds cleanups, fixes and consistency

* Tests: update Ryzen 5 Matisse with all CPU cores

* Add affinity_mask_str_r function and address other comments

- Fixed cpuid_grow_raw_data_array and cpu_raw_data_array_t.logical_cpu_t with the correct type
- Added a note about hard limit of cpu_raw_data_array_t
- Fixed a typo in cpuid_deserialize_raw_data_internal

* Fix build on Windows
2022-09-15 18:37:08 +02:00
Xorg
ecd45bb276
Tests: add more Zen2 tests from InstLatx64 2022-02-06 11:52:55 +01:00
Xorg
5ce462c32c
DB: add Lucienne
https://en.wikichip.org/wiki/amd/cores/lucienne
Fix X0rg/CPU-X#209
2022-02-06 11:29:46 +01:00
Xorg
9419c573ca
Detect RDSEED/ADX/SHA_NI features on AMD CPUs
These x86 instruction set extensions are present since Zen micro-architecture
Resolve #145
2020-05-18 21:05:20 +02:00
Xorg
fb1deb1fef Tests: update all tests to add fields for L1I 2020-05-10 17:02:45 +00:00
Xorg
6b5a1f5ea6
Tests: add amd_fn8000001dh subleaf
See e562798cec
2020-05-09 22:48:07 +02:00
Veselin Georgiev
9d22c61611
Merge pull request #141 from X0rg/master
Fixes for AMD Zen 2 CPUs
2020-05-04 21:35:42 +03:00
Xorg
46e86331bb
tests: remove duplicate addresses in RAW part 2020-05-03 17:12:33 +02:00
Xorg
848394ee46
Fix L3 cache associativity detection on AMD Zen 2 CPUs 2020-05-03 17:07:43 +02:00
eloaders
5f7f3c26cc DB: Add Threadripper (Castle Peak) 2019-12-31 10:58:20 +01:00
Xorg
848354a3f1 Tests: Add more Matisse CPUs 2019-07-11 22:49:08 +02:00
Xorg
bf7f57f519 Fix SSE unit size for Zen 2 CPUs
Related to #125
2019-07-11 22:29:27 +02:00
Xorg
081c354d17 DB: Add AMD Ryzen 3000 2019-07-07 19:38:46 +02:00