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53 commits

Author SHA1 Message Date
Xorg
e0dce2b0ef
DB: add Intel Tremont
Fix X0rg/CPU-X#253
2022-10-29 15:41:59 +02:00
Xorg
6c9798c3b0
DB: add Intel Penryn L
Related to #176
https://www.intel.com/content/www/us/en/products/sku/41498/intel-celeron-processor-900-1m-cache-2-20-ghz-800-mhz-fsb/specifications.html
2022-10-25 22:53:16 +02:00
Xorg
008983930b
DB: add Intel Raptor Lake-S 2022-10-23 12:11:49 +02:00
Xorg
5b8d89a37d
Tests: replace converted RAW dumps from instlatx64 to AIDA64 format
Since 2b8023f733 and 6b742be8cb, it makes sense to update these tests to add:
- RAW CPUID for all CPU cores
- Number of caches instances
2022-09-22 19:36:48 +02:00
Xorg
6b742be8cb Add cache instances field in cpu_id_t and system_id_t 2022-09-22 17:49:38 +02:00
Xorg
b1732e4785
Tests: minor fixes
Since ff5aafb5f4, xeon-scalable-4114.test and qemu.test are failling because RAW came from a VM.
Since 2b8023f733, godavari-x4.test is failling due to the merge after 9710e7c0ba
2022-09-20 06:58:32 +02:00
Xorg
2b8023f733
Support for hybrid CPU (#166)
* Set CMAKE_C_FLAGS_DEBUG to display warnings during build

CI workflows are reporting warnings. Adding more C flags here help to avoid that.

* Add new types

* Add set_cpu_affinity function

* Add cpu_identify_all function

* Add cpu_request_core_type function

* Add cpuid_get_all_raw_data, cpuid_serialize_all_raw_data and cpuid_deserialize_all_raw_data functions

* Detect hybrid architecture for Intel CPUs

* Update cpuid_tool to detect all CPU logical cores

* Rename tests subdirectories for Intel Core

* Update all tests

Since e4309a6c4bc3ad875711a1599cba01a205b3103e, new fields are reported by cpuid_tool

* Add Intel Alder Lake

Fix #157

* Remove convert_instlatx64.c

This tool is not useful anymore because the cpuid_deserialize_raw_data_internal() function can natively parse them since 5667e1401c

* Fix affinity_mask computation

* Define _GNU_SOURCE in configure.ac

Forgotten in 4f80964db5

* Use dynamic raw array in cpu_raw_data_array_t

* Add cpu_affinity_mask_t type

* Improve set_cpu_affinity function

- Print a warning if logical CPU number is not supported on operating system
- Return a boolean value in case of success instead of an integer

* Improve cpu_identify_all and cpu_request_core_type functions

* Use dynamic array for cpu_types in system_id_t

This commit also adds cleanups, fixes and consistency

* Tests: update Ryzen 5 Matisse with all CPU cores

* Add affinity_mask_str_r function and address other comments

- Fixed cpuid_grow_raw_data_array and cpu_raw_data_array_t.logical_cpu_t with the correct type
- Added a note about hard limit of cpu_raw_data_array_t
- Fixed a typo in cpuid_deserialize_raw_data_internal

* Fix build on Windows
2022-09-15 18:37:08 +02:00
Xorg
0f1ad69145
DB: add Tiger Lake
https://en.wikipedia.org/wiki/Tiger_Lake
Related to X0rg/CPU-X#198
2021-05-26 06:57:04 +02:00
Xorg
167d059a6b
DB: add Rocket Lake
https://en.wikichip.org/wiki/intel/microarchitectures/rocket_lake
InstLatx64/InstLatx64@1bbddafe7b
2021-03-20 17:24:58 +01:00
Xorg
4382796761
DB: add Xeon E3 1275
Score for entry 'Bloomfield (Xeon)' is 10 with this CPU
So it does not match with entry 'Sandy Bridge (Xeon)' (also score 10)
Adding this new entry increase score to 12, and fixing this issue

Close X0rg/CPU-X#182
2021-01-28 20:24:06 +01:00
Xorg
9468598740
Tests: add Core i5 8265U (Whiskey Lake-U)
See f61e3f80db
2021-01-12 19:48:38 +01:00
Xorg
98c9b6ff53
DB: add Gemini Lake
https://en.wikichip.org/wiki/intel/cores/gemini_lake
Reported in X0rg/CPU-X#164
2020-11-14 13:45:15 +01:00
Xorg
672720c501
DB: add Comet Lake-U
https://en.wikipedia.org/wiki/Comet_Lake_(microprocessor)#U-series_(Medium_power)
Reported in X0rg/CPU-X#162
2020-11-14 13:45:14 +01:00
Xorg
4846161cfc
DB: add Kaby Lake-G
https://en.wikichip.org/wiki/intel/cores/kaby_lake_g
Test file converted from http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00906E9_KabylakeG_CPUID.txt
2020-11-14 13:45:14 +01:00
Xorg
77dfe98a4c
DB: add Kaby Lake Refresh
https://en.wikichip.org/wiki/intel/cores/kaby_lake_r
Core i5 8250U was detected as Coffee Lake wrongly.
Reported in X0rg/CPU-X#161
2020-11-14 13:45:14 +01:00
Xorg
9abab57bdc
Fix code consistency
Result before this patch:

Checking enum `cpu_feature_t': 113 elements; max size (CPU_FLAGS_MAX=128)... OK
Checking enum `cpu_hint_t': 1 elements; max size (CPU_HINTS_MAX=16)... OK
Checking enum `cpu_sgx_feature_t': 2 elements; max size (SGX_FLAGS_MAX=14)... OK
Finding features:
..Mismatch - cpuid_main.c:688 - `AVX512VNNI' vs `avx512_vnni'
..Mismatch - cpuid_main.c:689 - `AVX512VBMI' vs `avx512_vbmi'
..Mismatch - cpuid_main.c:690 - `AVX512VBMI2' vs `avx512_vbmi2'
  cpuid_main.c: 113 features described
Found 113 total features and 113 named features
Checking whether all features have detection code... FAILED:
..No detection code for CPU_FEATURE_SSE5
2020-05-23 18:24:30 +02:00
Xorg
180154f03d
Detect AVX512VBMI and AVX512VBMI2 features on Intel CPUs
More information: https://en.wikichip.org/wiki/x86/avx-512
Resolve #134
2020-05-18 22:05:01 +02:00
Xorg
4b06a9a23e
Detect ABM feature on Intel CPUs
Resolve #144
2020-05-18 21:11:01 +02:00
Xorg
ef8986407f DB: add Ivy Bridge-E (Xeon) 2020-05-10 17:02:45 +00:00
Xorg
fb1deb1fef Tests: update all tests to add fields for L1I 2020-05-10 17:02:45 +00:00
Xorg
e592a83278 Tests: update to add L1I information
Related to 25d0614811
Dump of Core i5 520m from CPU-X#119
2020-05-10 17:02:45 +00:00
Xorg
8720a71b35
Tests: add Core i5 8250U
Related to X0rg/CPU-X#129
2020-05-09 14:46:59 +02:00
Veselin Georgiev
f6e4e23796 Add Xeon CLX (Cascade lake-based) using data from PR #129
Kudos to Leslie-Fang for providing it!
2019-08-09 11:18:20 +03:00
Xorg
7358232cc4 DB: Add Kaby Lake-U 2018-09-23 22:06:53 +02:00
Xorg
218015a983 Tests: Add Pentium 4405U 2018-08-08 15:02:08 +02:00
Xorg
9c382e33b3 DB: Add Skylake-X CPUs 2018-08-08 14:51:38 +02:00
Veselin Georgiev
45d04a9e4a Fix P-III Celeron misdetected as plain P-III (misreport id #8)
Reported via http://libcpuid.sourceforge.net/bugreport.php
The test in particular has no brand string, which was causing the
misdetection (as is the case with a lot of other models, libcpuid
relies on accurate brand string being programmed by the BIOS in
order to do the detection).

The actual CPU was a Pentium-III based Celeron (SL54Q), but it
was detected as "Pentium III (Coppermine)".

A bit of historical trivia: for the related Tualatin models, if
the BIOS doesn't enter a brand string, there might be NO WAY to
tell a regular P-3 and a P-3 Celeron apart: P-3s have variants
with 256KiB and 512KiB L2 cache, while the Celerons are 256 KiB, so
a 256KiB regular P3 is no different than its corresponding Celeron.
Only the FSB is different, but there's no way to detect this via
CPUID.

For the Coppermines its an easier case: Celerons are always 128KiB,
and Pentia are 256KiB, so I've added this distinction in the tables.
2018-05-02 11:05:25 +03:00
anonymous
a9c739d312 virtual machine test 2018-04-21 01:00:30 +00:00
Veselin Georgiev
f178de98f3 Fix issue #104: Intel Coffee Lake and Kaby Lake
Add support for detecting Coffee Lake i[357]s. Test included.
Thanks to @X0rg for reporting and to @exdeus for the raw cpu data.

The detection here relies on Kaby and Coffee lakes having different
number of cores for the equivalent brand:

i3: 2 cores in Kaby, 4 in Coffee
i5 and i7: 4 cores in Kaby, 6 in Coffee.
2018-02-04 13:37:36 +02:00
Veselin Georgiev
2f4c21e3a7 Fixed issue #103: Intel Xeon Scalable not recognised "code name".
Table entry added, test added, thanks to @phprus for reporting.
2018-01-28 02:06:37 +02:00
Veselin Georgiev
86bf8e8269 Fixed issue #81: Misdiagnosis microarchitecture for i3-3220T
It's a mystery to me why this CPU doesn't have RdRand.
A quick-n-dirty workaround is inserted to fix that.
2017-02-10 03:48:00 +02:00
Veselin Georgiev
e36a08deb9 Fixed issue #76: Skylake Core i5 badly recognized
Add support for detecting RDSEED and ADX instructions.
Use RDSEED instead of RTM to ascertain that the CPU is
Broadwell or later in recog_intel.c. This fixes
detection discrepancies on Linux, where RTM is not
made available (I guess there's no kernel support for it).

The two new flags are also now detected in the Broadwell
and Skylake tests. Update them as well.
2016-10-25 05:16:44 +03:00
Veselin Georgiev
3f38efb6c9 Fixed issue #54: Intel Atom N450 not recognised properly
Improved parsing of brand strings for both Pineview and Cedarview
Atoms.

Add tests for both the Pineview Atom, and also Broadwell-E
(forgotten in a previous commit).
2016-08-24 15:06:40 +03:00
Veselin Georgiev
87f3052a7b Add a test with L4 cache (courtesy of @phprus).
The test is a snapshot of a Haswell i7 (a.k.a. "Crystalwell") core.
This is the only test in the test DB right now which has lines for
L4 cache size, associativity and cacheline size different than "-1".

Also update create_test.py to accommodate for the new fields.
2016-07-07 00:53:03 +03:00
Veselin Georgiev
f52c02d394 Update all tests: add fields for L4 cache size, assoc. and line size. 2016-07-07 00:44:45 +03:00
Veselin Georgiev
7b9fe29cef Support for Skylake.
- Detection of hle, rtm, avx512* and sha-ni instructions
- Detection for Skylake
- Add test with Skylake i5
2016-05-19 01:37:45 +03:00
wdlkmpx
be254c30ef Add 2 Intel P4 tests / Rename some tests/codenames
Rename some codenames to keep things tidy
2016-05-17 13:08:16 +03:00
wdlkmpx
7aa3155fc5 Add Arrandale mobile
Processor: Intel(R) Pentium(R) CPU        P6100  @ 2.00GHz
2016-05-07 19:43:33 +00:00
wdlkmpx
4047785e97 Recognize Dual Core (Penryn) and more Core2 processors
By adding a new entry to the match table

There's also a new test:
 Intel Pentium Dual-Core Mobile T4500
 Specs:
 http://www.cpu-world.com/CPUs/Pentium_Dual-Core/Intel-Pentium%20Dual-Core%20Mobile%20T4500%20AW80577GG0521MA.html
2016-04-28 00:28:07 +00:00
wdlkmpx
f26c1151f0 Fix issue with HyperThreading status in old cpus
Early P4 processors come with the HT flag, but that feature
is not enabled.

This makes it work the way it should.
2016-04-24 17:28:16 +00:00
wdlkmpx
fa9640b3a2 tests: add p4 celeron willamette-128
1.8GHz
Specs:
http://www.cpu-world.com/CPUs/Celeron/Intel-Celeron%201800%20-%20RK80531RC033128%20(BX80531P180G128).html
2016-04-24 17:26:44 +00:00
wdlkmpx
75c3c36cbb tests: add intel p4 prescott with HT enabled
This is from a Pentium 4 Prescott 3.20GHz processor
Specs:
http://www.cpu-world.com/CPUs/Pentium_4/Intel-Pentium%204%203.2%20GHz%20-%20RK80546PG0881M%20(BX80546PG3200E).html
2016-04-24 17:26:03 +00:00
wdlkmpx
5f420362c6 P4 Celeron: more precise descriptions
According to wikipedia, cpu-world and some cpu-z screenshots, these processors
do have a code name and it's willamette, northwood, prescott or cedar mill

Signed-off-by: Veselin Georgiev <anrieff@gmail.com>
2016-04-19 00:57:11 +03:00
Veselin Georgiev
4e3b633bee Fix tests due to X0rg's codename changes. 2015-09-13 18:38:59 +03:00
Veselin Georgiev
153a6a7c7d Add support for detecting Xeon Ivy Bridge.
Based on report #7 from the sourceforge bugtrack page.
2015-09-03 09:33:38 +03:00
Veselin Georgiev
94fc6ae36a Modify the table matcher a bit. Put some weights on the different fields.
Priously all fields in the matchtable were treated equal in importance.
With this change, the cache size a taken with half the weight in the decision.

Also add detection entries for some more recent Haswells, and the respective
tests. These are an i5 Haswell from a Mac Book Pro, and a i7 Haswel from
Thinkpad T540.
2015-04-17 01:21:30 +03:00
Veselin Georgiev
046d2ca2ab Better support for AVX, AVX2, BMI1 and BMI2 instruction set detection.
- Detect AVX and AVX2 on both Intel and AMD CPUs
- Detect BMI1 and BMI2 instruction sets (BMI2 is only on Haswell, BMI1 is
  also present on Bulldozers).
- Fix tests to reflect changes.
2015-04-16 20:54:37 +03:00
Veselin Georgiev
fa2083a992 Add support for detecting AVX2. Confirmed to detect on Haswell i3. 2014-09-24 00:03:11 +03:00
Veselin Georgiev
ce02f0bc96 Fix broken tests, where rdtscp in recent Intel chips is missing.
As described in previous commit.
2014-09-23 15:21:02 +03:00
Veselin Georgiev
ece31fb8d3 Add a test for Atom N2800 (codename Cedarview). 2014-08-20 11:25:52 +03:00