Xorg
9419c573ca
Detect RDSEED/ADX/SHA_NI features on AMD CPUs
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These x86 instruction set extensions are present since Zen micro-architecture
Resolve #145
2020-05-18 21:05:20 +02:00
Xorg
fb1deb1fef
Tests: update all tests to add fields for L1I
2020-05-10 17:02:45 +00:00
Xorg
6b5a1f5ea6
Tests: add amd_fn8000001dh subleaf
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See e562798cec
2020-05-09 22:48:07 +02:00
Veselin Georgiev
9d22c61611
Merge pull request #141 from X0rg/master
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Fixes for AMD Zen 2 CPUs
2020-05-04 21:35:42 +03:00
Xorg
46e86331bb
tests: remove duplicate addresses in RAW part
2020-05-03 17:12:33 +02:00
Xorg
848394ee46
Fix L3 cache associativity detection on AMD Zen 2 CPUs
2020-05-03 17:07:43 +02:00
eloaders
5f7f3c26cc
DB: Add Threadripper (Castle Peak)
2019-12-31 10:58:20 +01:00
Xorg
848354a3f1
Tests: Add more Matisse CPUs
2019-07-11 22:49:08 +02:00
Xorg
bf7f57f519
Fix SSE unit size for Zen 2 CPUs
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Related to #125
2019-07-11 22:29:27 +02:00
Xorg
5aedd53624
Add more test files for AMD Zen CPUs
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Dumps found on http://instlatx64.atw.hu/
2019-07-07 20:03:45 +02:00
Xorg
081c354d17
DB: Add AMD Ryzen 3000
2019-07-07 19:38:46 +02:00
Xorg
3a8343c77c
Fix Ryzen core count calculation
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Close X0rg/CPU-X#86
2018-11-03 21:30:01 +01:00
Xorg
f1e1ad58e7
DB: Add Raven Ridge APUs and Threadripper CPUs
2018-03-20 19:52:40 +01:00
Veselin Georgiev
94507ded22
Fixed issue #86 : AMD Ryzen support
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Also add a test of Ryzen 7 (1800X).
2017-03-20 02:28:28 +02:00
Veselin Georgiev
f52c02d394
Update all tests: add fields for L4 cache size, assoc. and line size.
2016-07-07 00:44:45 +03:00
Veselin Georgiev
3a977a4f99
Add detection support for the AMD TBM instructions. Update Vishera test.
2016-05-19 01:37:45 +03:00
wdlkmpx
061bd5986c
Ability to display AMD brand code
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So that it's easier to test and debug
Also added AMD Champlain mobile
Processor: AMD Athlon(tm) II P320 Dual-Core Processor
2016-05-11 21:21:02 +00:00
Kurt Cancemi
dea8a6006a
Fix tests
2016-04-24 00:27:42 -04:00
Kurt Cancemi
c5493f8008
Fix tests
2016-01-16 10:55:08 -05:00
Veselin Georgiev
046d2ca2ab
Better support for AVX, AVX2, BMI1 and BMI2 instruction set detection.
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- Detect AVX and AVX2 on both Intel and AMD CPUs
- Detect BMI1 and BMI2 instruction sets (BMI2 is only on Haswell, BMI1 is
also present on Bulldozers).
- Fix tests to reflect changes.
2015-04-16 20:54:37 +03:00
Veselin Georgiev
b183a2d2f8
Magny-cours is still K10, so move the test to the proper dir.
2014-07-23 22:30:52 +03:00
Veselin Georgiev
decba3e728
Simplify Bulldozer detection; differentiate Bulldozer<->Vishera.
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Also add two tests:
- AMD FX-8150 - which is decoded as 'Bulldozer X4'
- AMD FX-9590 - which is decoted as 'Vishera X4'
2014-07-23 22:13:37 +03:00
Veselin Georgiev
019170b65f
Refactor the tests: put each test case in a separate file
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Instead of one big pile of tests in tests_stash.txt, keep each CPU
example raw data/parsed data in a file, ordered in a tree by
manufacturer and microarchitecture. The 64 .test files have been
extracted from tests_stash.txt. The add_test script is changed to
create_test and it doesn't append to test_stash.txt, instead it
spits out data to be saved in a .test file.
run_tests.py is not refactored yet, to be done in a subsequent commit.
2014-07-15 19:59:35 +03:00
